rk3288: add media
BUG=chrome-os-partner:29778
TEST=Build coreboot
Change-Id: I74b30ecfe40c039855b835db0dfd0cd25adf960e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a30378a3152c930029a5b170cc6bf46180b5c7b8
Original-Change-Id: I5105e5277b8072c06bb41b39479373697ef81c67
Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209468
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/8860
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc
index 05003a2..e0f3224 100644
--- a/src/soc/rockchip/rk3288/Makefile.inc
+++ b/src/soc/rockchip/rk3288/Makefile.inc
@@ -31,10 +31,10 @@
romstage-y += cbmem.c
romstage-y += timer.c
romstage-y += monotonic_timer.c
-romstage-y += media.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-y += clock.c
romstage-y += spi.c
+romstage-y += media.c
ramstage-y += cbmem.c
ramstage-y += timer.c
diff --git a/src/soc/rockchip/rk3288/media.c b/src/soc/rockchip/rk3288/media.c
index 75713eb..1389eb2 100644
--- a/src/soc/rockchip/rk3288/media.c
+++ b/src/soc/rockchip/rk3288/media.c
@@ -20,8 +20,17 @@
#include <cbfs.h>
#include <string.h>
#include <console/console.h>
+#include "soc/rockchip/rk3288/spi.h"
int init_default_cbfs_media(struct cbfs_media *media)
{
- return 0;
+#if defined(__BOOT_BLOCK__)
+ return initialize_rockchip_spi_cbfs_media(media,
+ (void *)CONFIG_CBFS_SRAM_CACHE_ADDRESS,
+ CONFIG_CBFS_SRAM_CACHE_SIZE);
+#else
+ return initialize_rockchip_spi_cbfs_media(media,
+ (void *)CONFIG_CBFS_DRAM_CACHE_ADDRESS,
+ CONFIG_CBFS_DRAM_CACHE_SIZE);
+#endif
}