intel/fsp_baytrail: Load APs microcode in baytrail_init_cpus
Load microcode to APs when performing baytrail_init_cpus. The updated
fsp1_0 driver calls TempRamInit API with a dummy microcode, so FSP
will not handle the microcode load.
Change-Id: I7b7c0f43da0d149048ae5a8fd547828f42de04fd
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/12095
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/soc/intel/fsp_baytrail/cpu.c b/src/soc/intel/fsp_baytrail/cpu.c
index b2eafd1..2f6defc 100644
--- a/src/soc/intel/fsp_baytrail/cpu.c
+++ b/src/soc/intel/fsp_baytrail/cpu.c
@@ -76,11 +76,11 @@
setup_lapic();
mp_params.num_cpus = pattrs->num_cpus,
- mp_params.parallel_microcode_load = 0,
+ mp_params.parallel_microcode_load = 1,
mp_params.adjust_apic_id = adjust_apic_id;
mp_params.flight_plan = &mp_steps[0];
mp_params.num_records = ARRAY_SIZE(mp_steps);
- mp_params.microcode_pointer = 0;
+ mp_params.microcode_pointer = pattrs->microcode_patch;
if (mp_init(cpu_bus, &mp_params)) {
printk(BIOS_ERR, "MP initialization failure.\n");