sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I1589fd8df4ec0fcdcde283513734dfd8458df2f7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40807
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index 0f3a1b9..8bc45f6 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -30,10 +30,8 @@
pci_write_config32(dev, 0xfc, 0x205b1708);
#endif
- reg32 = pci_read_config32(dev, PCI_COMMAND);
- reg32 |= PCI_COMMAND_MASTER;
- //reg32 |= PCI_COMMAND_SERR;
- pci_write_config32(dev, PCI_COMMAND, reg32);
+ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
+ //pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_SERR);
/* For others, done in MRC. */
#if CONFIG(USE_NATIVE_RAMINIT)