nb/intel/*/graphic_init: use sizeof instead of hardcoding edid size
Change-Id: I2b8c4ef75cca9f9d5251789cda4187a02076b69d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16964
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 0545ba5..7e834e6 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -99,7 +99,8 @@
for (i = 0; i <= 0x18; i++)
vga_cr_write(i, cr[i]);
- intel_gmbus_read_edid(mmio + GMBUS0, 3, 0x50, edid_data, 128);
+ intel_gmbus_read_edid(mmio + GMBUS0, 3, 0x50, edid_data,
+ sizeof(edid_data));
decode_edid(edid_data,
sizeof(edid_data), &edid);
mode = &edid.mode;
@@ -410,7 +411,8 @@
udelay(1);
- intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, edid_data, 128);
+ intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, edid_data,
+ sizeof(edid_data));
intel_gmbus_stop(mmio + GMBUS0);
decode_edid(edid_data,
sizeof(edid_data), &edid);
@@ -644,7 +646,8 @@
{
u8 vga_edid[128];
u8 header[8] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00};
- intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, vga_edid, 128);
+ intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, vga_edid,
+ sizeof(vga_edid));
intel_gmbus_stop(mmio + GMBUS0);
for (int i = 0; i < 8; i++) {
if (vga_edid[i] != header[i]) {
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 3bfb5b1..eeb377a 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -103,7 +103,8 @@
"i915lightup: graphics %p mmio %p addrport %04x physbase %08x\n",
(void *)pgfx, pmmio, piobase, pphysbase);
- intel_gmbus_read_edid(pmmio + GMBUS0, 3, 0x50, edid_data, 128);
+ intel_gmbus_read_edid(pmmio + GMBUS0, 3, 0x50, edid_data,
+ sizeof(edid_data));
decode_edid(edid_data, sizeof(edid_data), &edid);
mode = &edid.mode;
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index 3b73929..46d867f 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -696,7 +696,8 @@
power_port(mmio);
- intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data, 128);
+ intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data,
+ sizeof(edid_data));
intel_gmbus_stop(mmio + PCH_GMBUS0);
decode_edid(edid_data,
sizeof(edid_data), &edid);
diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
index 831e8ce..32becc1 100644
--- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
+++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
@@ -202,7 +202,8 @@
enable_port(mmio);
- intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data, 128);
+ intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data,
+ sizeof(edid_data));
intel_gmbus_stop(mmio + PCH_GMBUS0);
decode_edid(edid_data,
sizeof(edid_data), &edid);
diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c
index c2c8087..756f7bf 100644
--- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c
+++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c
@@ -186,7 +186,8 @@
power_port(mmio);
- intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data, 128);
+ intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data,
+ sizeof(edid_data));
decode_edid(edid_data, sizeof(edid_data), &edid);
mode = &edid.mode;
diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c
index acef053..e950386 100644
--- a/src/northbridge/intel/x4x/gma.c
+++ b/src/northbridge/intel/x4x/gma.c
@@ -119,7 +119,8 @@
udelay(1);
- intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, edid_data, 128);
+ intel_gmbus_read_edid(mmio + GMBUS0, 2, 0x50, edid_data,
+ sizeof(edid_data));
intel_gmbus_stop(mmio + GMBUS0);
decode_edid(edid_data,
sizeof(edid_data), &edid);