sc7180: report hardware watchdog reset after reboot
add WATCHDOG_TOMBSTONE in memlayout.ld
Change-Id: I57ece39ff3d49f2bab259cbd92ab039a49323119
Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44868
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc
index eea38d9..a0d3bc6 100644
--- a/src/soc/qualcomm/sc7180/Makefile.inc
+++ b/src/soc/qualcomm/sc7180/Makefile.inc
@@ -29,6 +29,7 @@
################################################################################
romstage-y += cbmem.c
+romstage-y += watchdog.c
romstage-y += timer.c
romstage-y += ../common/qclib.c
romstage-y += qclib.c
diff --git a/src/soc/qualcomm/sc7180/include/soc/clock.h b/src/soc/qualcomm/sc7180/include/soc/clock.h
index 62e2a34..b303efe 100644
--- a/src/soc/qualcomm/sc7180/include/soc/clock.h
+++ b/src/soc/qualcomm/sc7180/include/soc/clock.h
@@ -28,6 +28,8 @@
#define AOP_RESET_SHFT 0
#define RCG_MODE_DUAL_EDGE 2
+#define WDOG_RESET_BIT_MASK 1
+
#define SCALE_FREQ_SHFT 11
struct sc7180_clock {
@@ -125,9 +127,13 @@
check_member(sc7180_gcc, apcs_clk_br_en1, 0x52008);
struct sc7180_aoss {
- u8 _res[0x5002c];
+ u8 _res0[0x50020];
+ u32 aoss_cc_reset_status;
+ u8 _res1[0x5002C - 0x50024];
u32 aoss_cc_apcs_misc;
};
+check_member(sc7180_aoss, aoss_cc_reset_status, 0x50020);
+check_member(sc7180_aoss, aoss_cc_apcs_misc, 0x5002C);
struct sc7180_disp_cc {
u8 _res0[0x2004];
diff --git a/src/soc/qualcomm/sc7180/include/soc/watchdog.h b/src/soc/qualcomm/sc7180/include/soc/watchdog.h
new file mode 100644
index 0000000..c5ddb55
--- /dev/null
+++ b/src/soc/qualcomm/sc7180/include/soc/watchdog.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _SOC_QUALCOMM_SC7180_WDOG_H__
+#define _SOC_QUALCOMM_SC7180_WDOG_H__
+
+void check_wdog(void);
+
+#endif /* _SOC_QUALCOMM_SC7180_WDOG_H__ */
diff --git a/src/soc/qualcomm/sc7180/memlayout.ld b/src/soc/qualcomm/sc7180/memlayout.ld
index 94300e8..0142242 100644
--- a/src/soc/qualcomm/sc7180/memlayout.ld
+++ b/src/soc/qualcomm/sc7180/memlayout.ld
@@ -27,7 +27,8 @@
SSRAM_END(0x146AE000)
BSRAM_START(0x14800000)
- REGION(pbl_timestamps, 0x14800000, 84K, 4K)
+ REGION(pbl_timestamps, 0x14800000, 83K, 4K)
+ WATCHDOG_TOMBSTONE(0x14814FFC, 4)
BOOTBLOCK(0x14815000, 40K)
PRERAM_CBFS_CACHE(0x1481F000, 70K)
PRERAM_CBMEM_CONSOLE(0x14830800, 32K)
diff --git a/src/soc/qualcomm/sc7180/watchdog.c b/src/soc/qualcomm/sc7180/watchdog.c
new file mode 100644
index 0000000..954f68a
--- /dev/null
+++ b/src/soc/qualcomm/sc7180/watchdog.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/watchdog.h>
+#include <soc/clock.h>
+#include <console/console.h>
+#include <device/mmio.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
+void check_wdog(void)
+{
+ uint32_t wdog_sta = read32(&aoss->aoss_cc_reset_status);
+
+ if (wdog_sta & WDOG_RESET_BIT_MASK)
+ mark_watchdog_tombstone();
+}