src: Introduce `ARCH_ALL_STAGES_X86`
Introduce the `ARCH_ALL_STAGES_X86` Kconfig symbol to automatically
select the per-stage arch options. Subsequent commits will leverage
this to allow choosing between 32-bit and 64-bit coreboot where all
stages are x86. AMD Picasso and AMD Cezanne are the only exceptions
to this rule: they disable `ARCH_ALL_STAGES_X86` and explicitly set
the per-stage arch options accordingly.
Change-Id: Ia2ddbae8c0dfb5301352d725032f6ebd370428c9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 1003376..2a42a1c 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -28,6 +28,7 @@
config ARCH_ALL_STAGES_X86_32
bool
+ default ARCH_ALL_STAGES_X86 && !ARCH_ALL_STAGES_X86_64
select ARCH_BOOTBLOCK_X86_32
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
@@ -58,6 +59,10 @@
select ARCH_ROMSTAGE_X86_64
select ARCH_RAMSTAGE_X86_64
+config ARCH_ALL_STAGES_X86
+ bool
+ default y
+
config ARCH_X86_64_PGTBL_LOC
hex "x86_64 page table location in CBFS"
depends on ARCH_BOOTBLOCK_X86_64
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index f71b8ed..15622c9 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -6,7 +6,6 @@
default y if CPU_AMD_AGESA_FAMILY15_TN
default y if CPU_AMD_AGESA_FAMILY16_KB
default n
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select DRIVERS_AMD_PI
select TSC_SYNC_LFENCE
diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig
index 4cc6902..aff8d7dc 100644
--- a/src/cpu/amd/pi/Kconfig
+++ b/src/cpu/amd/pi/Kconfig
@@ -4,7 +4,6 @@
bool
default y if CPU_AMD_PI_00730F01
default n
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select DRIVERS_AMD_PI
select TSC_SYNC_LFENCE
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 1c91941..9830305 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -6,7 +6,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select MMX
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 6ddb99e..a710e67 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_1067X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig
index 9f59b47..ac45cfa 100644
--- a/src/cpu/intel/model_106cx/Kconfig
+++ b/src/cpu/intel/model_106cx/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_106CX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index f539247..731ea37 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -5,7 +5,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select SSE2
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index 9a0d792..67fd701 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -10,7 +10,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64
select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig
index f9d1236..6d41d94 100644
--- a/src/cpu/intel/model_65x/Kconfig
+++ b/src/cpu/intel/model_65x/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_65X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig
index 2fce135..26a303b 100644
--- a/src/cpu/intel/model_67x/Kconfig
+++ b/src/cpu/intel/model_67x/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_67X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig
index 67d4b77..79629077 100644
--- a/src/cpu/intel/model_68x/Kconfig
+++ b/src/cpu/intel/model_68x/Kconfig
@@ -2,6 +2,5 @@
config CPU_INTEL_MODEL_68X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig
index 418f9bd..14274a3 100644
--- a/src/cpu/intel/model_6bx/Kconfig
+++ b/src/cpu/intel/model_6bx/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_6BX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig
index 240cee6..c7d54c5 100644
--- a/src/cpu/intel/model_6ex/Kconfig
+++ b/src/cpu/intel/model_6ex/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_6EX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index 048178a..4999726 100644
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_6FX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig
index eb2268a..e05cf89 100644
--- a/src/cpu/intel/model_6xx/Kconfig
+++ b/src/cpu/intel/model_6xx/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_6XX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig
index e1708ba..672cf75 100644
--- a/src/cpu/intel/model_f2x/Kconfig
+++ b/src/cpu/intel/model_f2x/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_F2X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
select SMM_ASEG
diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index 151a8e7..b0a9f7c 100644
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_F3X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_INTEL_COMMON
diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig
index 2d31655..550a978 100644
--- a/src/cpu/intel/model_f4x/Kconfig
+++ b/src/cpu/intel/model_f4x/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_F4X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index 440d8cb..6d897fe 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -57,5 +57,4 @@
bool
default n if CPU_QEMU_X86_64
default y
- select ARCH_ALL_STAGES_X86_32
endif
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 78db12f..7dd3447 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -70,6 +70,9 @@
select X86_AMD_FIXED_MTRRS
select X86_AMD_INIT_SIPI
+config ARCH_ALL_STAGES_X86
+ default n
+
config SOC_AMD_COMMON_BLOCK_UCODE_SIZE
default 5568
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 44728a8..42c3bfc 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -69,6 +69,9 @@
select UDK_2017_BINDING
select HAVE_CF9_RESET
+config ARCH_ALL_STAGES_X86
+ default n
+
config SOC_AMD_COMMON_BLOCK_UCODE_SIZE
default 3200
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 0e80f14..821d1ee 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -10,7 +10,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
select COLLECT_TIMESTAMPS_NO_TSC
diff --git a/src/soc/example/min86/Kconfig b/src/soc/example/min86/Kconfig
index 66c0e8b..660bf36 100644
--- a/src/soc/example/min86/Kconfig
+++ b/src/soc/example/min86/Kconfig
@@ -14,7 +14,6 @@
config SOC_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select NO_MONOTONIC_TIMER
select NO_MMCONF_SUPPORT
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 3c49748..4cb512a 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -13,7 +13,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 5b743c6..d81015e 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -24,7 +24,6 @@
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NO_PCAT_8259
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
# CPU specific options
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 6c5610d..305e5b7 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -8,7 +8,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select BOOT_DEVICE_SUPPORTS_WRITES
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 7301d63..8ccf043 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -8,7 +8,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select BOOT_DEVICE_SUPPORTS_WRITES
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 5fc80af..8f2f9d2 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -47,7 +47,6 @@
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NHLT
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 4169ec4..bfd8c3f 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -13,7 +13,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select DEBUG_GPIO
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index f440d33..a6498b0 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -8,7 +8,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index e5ab889..1396460 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -8,7 +8,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index a05cd72..4d01d31 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -8,7 +8,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index ffb08c6..497322f 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -9,7 +9,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select NO_MMCONF_SUPPORT
select REG_SCRIPT
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index d16a7c9..9136a5f 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -23,7 +23,6 @@
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NHLT
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index e41d7a7..9dc38a5 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -8,7 +8,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 1a63e59..60786aa 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -26,7 +26,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES
select CPU_INTEL_COMMON