diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index ae9d707..00f5f47 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -13,6 +13,11 @@
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <southbridge/intel/lynxpoint/me.h>
 
+/* Copy SPD data for on-board memory */
+void __weak copy_spd(struct pei_data *peid)
+{
+}
+
 void __weak mb_late_romstage_setup(void)
 {
 }
@@ -53,8 +58,7 @@
 
 	report_platform_info();
 
-	if (params->copy_spd != NULL)
-		params->copy_spd(params->pei_data);
+	copy_spd(params->pei_data);
 
 	sdram_initialize(params->pei_data);