drivers/intel/fsp2_0: Add provision to extract FSP Performance Data

This patch enriches coreboot FSP2.0 driver to extract the FSP timestamp
from FPDT (Firmware Performance Data Table) and display right after
FSP-S exits (from `fsp_silicon_init()` function), based on SoC user
selects the required `DISPLAY_FSP_TIMESTAMPS` config.

The prerequisite to this implementation is to have FSP binary built with
`PcdFspPerformanceEnable` PCD set to `TRUE` to allow FSP to populate
the FPDT HOB.

BUG=b:216635831
TEST=Able to dump FSP performance data with DISPLAY_FSP_TIMESTAMPS
Kconfig selected and met the FSP prerequisites.
+--------------------------------------------------+
|------ FSP Performance Timestamp Table Dump ------|
+--------------------------------------------------+
| Perf-ID	Timestamp(ms)	       String/GUID |
+--------------------------------------------------+
    0	          460253    SEC/52c05b14-0b98-496c-bc3b04b50211d680
   50	          460263    PEI/52c05b14-0b98-496c-bc3b04b50211d680
   40	          460274    PreMem/52c05b14-0b98-496c-bc3b04b50211d680
    1	          495803    9b3ada4f-ae56-4c24-8deaf03b7558ae50
    2	          508959    9b3ada4f-ae56-4c24-8deaf03b7558ae50
    1	          515253    6141e486-7543-4f1a-a579ff532ed78e75
    2	          525453    6141e486-7543-4f1a-a579ff532ed78e75
    1	          532059    baeb5bee-5b33-480a-8ab7b29c85e7ceab
    2	          546806    baeb5bee-5b33-480a-8ab7b29c85e7ceab
    1	          553302    1b04374d-fa9c-420f-ac62fee6d45e8443
    2	          563859    1b04374d-fa9c-420f-ac62fee6d45e8443
    1	          569955    88c17e54-ebfe-4531-a992581029f58126
    2	          575753    88c17e54-ebfe-4531-a992581029f58126
    1	          582099    a8499e65-a6f6-48b0-96db45c266030d83
 50f0	          599599    unknown name/3112356f-cc77-4e82-86d53e25ee8192a4
 50f1	          716649    unknown name/3112356f-cc77-4e82-86d53e25ee8192a4
    2	          728507    a8499e65-a6f6-48b0-96db45c266030d83
    1	          734755    9e1cc850-6731-4848-87526673c7005eee
....

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ia1b7f6b98bafeec0afe843f0f78c99c2f34f50b3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 05cea11..263ea3b 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -244,6 +244,9 @@
 	timestamp_add_now(TS_FSP_SILICON_INIT_LOAD);
 	fsps_load();
 	do_silicon_init(&fsps_hdr);
+
+	if (CONFIG(DISPLAY_FSP_TIMESTAMPS))
+		fsp_display_timestamp();
 }
 
 __weak void soc_load_logo(FSPS_UPD *supd) { }