tree f3a13823fffe374c0f263a8702726135252d5f06
parent 3afa467a880392f4dbbbc69373eb555731e738b4
author Subrata Banik <subrata.banik@intel.com> 1635356047 +0530
committer Subrata Banik <subrata.banik@intel.com> 1635619509 +0000

soc/intel/common: Add DDR5 and LPDDR5 into the SMBIOS table

Add DDR5 and LPDDR5 memory technology into the SMBIOS Memory Type
table.

Change-Id: I1ec442cf0bd830db99e3636445724b6be01c5564
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>