soc/mediatek/mt8188: Enable lastbus debug hardware

Lastbus is a bus debug tool. When the bus hangs, the bus transmission
information before resetting will be recorded.

The watchdog cannot clear it and it will be printed out for bus hanging
analysis.

There are two versions for lastbus:
Version 1 for MT8186, and version 2 for MT8188.

BUG=b:263753374
TEST=build pass.
Change-Id: Ibaf510481d1941376bd8da0168ef17c99a0fb9a2
Signed-off-by: ot_zhenguo.li <ot_zhenguo.li@mediatek.corp-partner.google.com>
Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73624
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
diff --git a/src/soc/mediatek/mt8188/lastbus.c b/src/soc/mediatek/mt8188/lastbus.c
new file mode 100644
index 0000000..f2c0b0d
--- /dev/null
+++ b/src/soc/mediatek/mt8188/lastbus.c
@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/lastbus_v2.h>
+
+const struct lastbus_config lastbus_cfg = {
+	.latch_platform = "MT8188",
+	.timeout_ms = 200,
+	.timeout_type = 0,
+	.num_used_monitors = 6,
+	.monitors = {
+		{
+			.name = "debug_ctrl_ao_INFRA_AO",
+			.base = INFRA_AO_DBUG_BASE,
+			.num_ports = 34,
+			.num_idle_mask = 2,
+			.idle_masks = {
+				{
+					.reg_offset = 0x04,
+					.reg_value = 0x2,
+				},
+				{
+					.reg_offset = 0x08,
+					.reg_value = 0x10000,
+				},
+			},
+			.bus_freq_mhz = 78,
+		},
+		{
+			.name = "debug_ctrl_ao_INFRA2_AO",
+			.base = INFRA2_AO_DBUG_BASE,
+			.num_ports = 9,
+			.num_idle_mask = 0,
+			.bus_freq_mhz = 78,
+		},
+		{
+			.name = "debug_ctrl_ao_PERI_AO",
+			.base = PERI_AO_BASE,
+			.num_ports = 25,
+			.num_idle_mask = 1,
+			.idle_masks = {
+				{
+					.reg_offset = 0x04,
+					.reg_value = 0x20000,
+				},
+			},
+			.bus_freq_mhz = 78,
+		},
+		{
+			.name = "debug_ctrl_ao_PERI_AO2",
+			.base = PERI_AO2_BASE,
+			.num_ports = 20,
+			.num_idle_mask = 0,
+			.bus_freq_mhz = 78,
+		},
+		{
+			.name = "debug_ctrl_ao_PERI_PAR_AO",
+			.base = PERI_PAR_AO_BASE,
+			.num_ports = 18,
+			.num_idle_mask = 0,
+			.bus_freq_mhz = 78,
+		},
+		{
+			.name = "debug_ctrl_ao_FMEM_AO",
+			.base = FMEM_AO_BASE,
+			.num_ports = 28,
+			.num_idle_mask = 1,
+			.idle_masks = {
+				{
+					.reg_offset = 0x14,
+					.reg_value = 0x204,
+				},
+			},
+			.bus_freq_mhz = 78,
+		},
+	},
+};