soc/intel/alderlake: Replace TcssD3ColdDisable with D3COLD_SUPPORT
Remove the `TcssD3ColdDisable` option in devicetree, as it exists
in Kconfig. The setting is currently unused.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I2590e8dec0a308e0dc3d467cb3dd2bb97e877492
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74477
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index b6fc43d..c466212 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -275,8 +275,6 @@
int s0ix_enable;
/* Support for TCSS xhci, xdci, TBT PCIe root ports and DMA controllers */
uint8_t tcss_d3_hot_disable;
- /* Support for TBT PCIe root ports and DMA controllers with D3Hot->D3Cold */
- uint8_t tcss_d3_cold_disable;
/* Enable DPTF support */
int dptf_enable;
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 704f910..7789cec 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -648,7 +648,7 @@
/* D3Hot and D3Cold for TCSS */
s_cfg->D3HotEnable = !config->tcss_d3_hot_disable;
- s_cfg->D3ColdEnable = CONFIG(D3COLD_SUPPORT) && !config->tcss_d3_cold_disable;
+ s_cfg->D3ColdEnable = CONFIG(D3COLD_SUPPORT);
s_cfg->UsbTcPortEn = 0;
for (int i = 0; i < MAX_TYPE_C_PORTS; i++) {