| commit | 6b888adcff446c65ef22996728008ff5c6d5a720 | [log] [tgz] |
|---|---|---|
| author | Subrata Banik <subratabanik@google.com> | Thu Apr 14 13:29:50 2022 +0530 |
| committer | Subrata Banik <subratabanik@google.com> | Tue Apr 19 05:45:07 2022 +0000 |
| tree | 91f8cf5c1408c5b1691f2dda41580543cf75ca3a | |
| parent | e0b7423d671b4e310577e150fbaf4cd4c9ff89f2 [diff] [blame] |
soc/intel/cmn/lpc: Fix typo from FAST_SPIBAR to LPC BUG=b:211954778 TEST=None Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ib8cc4b8d13b61e3935f2050d25ce0278162c91c4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63629 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index 2bd9858..a44c2da 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -152,7 +152,7 @@ } /* - * Set FAST_SPIBAR BIOS Control register based on input bit field. + * Set LPC BIOS Control register based on input bit field. */ static void lpc_set_bios_control_reg(uint8_t bios_cntl_bit) {