intel/gma: fix RPNFREQ_VAL bitmask
gma.c of Nehalem was copied from Sandy/Ivy Bridge, so fix it there too.
Tested on lenovo/x230. Since both the bit that was masked wrongly and the
one that wasn't masked, but sould have been, are 0, the behaviour on
lenovo/x230 doesn't change.
Change-Id: I5f51c4929df83f948fcb7dc06e07ac3cc4ccf4f2
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/22596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index 0c681cc..4dcbfb3 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -488,10 +488,11 @@
}
/* 12: Normal Frequency Request */
- /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 (8 bits!? use 7) */
+ /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 */
+ /* only the lower 7 bits are used and shifted left by 25 */
reg32 = MCHBAR32(0x5998);
reg32 >>= 16;
- reg32 &= 0xef;
+ reg32 &= 0x7f;
reg32 <<= 25;
gtt_write(0xa008, reg32);
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 61b9008..74aabf9 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -498,10 +498,11 @@
}
/* 12: Normal Frequency Request */
- /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 (8 bits!? use 7) */
+ /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 */
+ /* only the lower 7 bits are used and shifted left by 25 */
reg32 = MCHBAR32(0x5998);
reg32 >>= 16;
- reg32 &= 0xef;
+ reg32 &= 0x7f;
reg32 <<= 25;
gtt_write(0xa008, reg32);