commit | 6b688f5329e560ef432f6ea281b2fe3d905ef297 | [log] [tgz] |
---|---|---|
author | Patrick Georgi <pgeorgi@google.com> | Fri Feb 12 13:49:11 2021 +0100 |
committer | Patrick Georgi <pgeorgi@google.com> | Mon Feb 15 11:30:40 2021 +0000 |
tree | 831ff654f7477b293421e38b8ed880f2cc740386 | |
parent | 036d66be051c4aeeac3b6220974e93645489c27d [diff] [blame] |
src: use ARRAY_SIZE where possible Generated with a variant of https://coccinelle.gitlabpages.inria.fr/website/rules/array.cocci Change-Id: I083704fd48faeb6c67bba3367fbcfe554a9f7c66 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50594 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 4822ead..4a8cf90 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c
@@ -92,7 +92,7 @@ 1, 7, 2, 1, 1, 3 }; -#define MAX_SPD_REFRESH_RATE ((sizeof(refresh_rate_map) / sizeof(uint32_t)) - 1) +#define MAX_SPD_REFRESH_RATE (ARRAY_SIZE(refresh_rate_map) - 1) // SPD parameters that must match for dual-channel operation static const uint8_t dual_channel_parameters[] = {