Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 6b5bf407deb52a900ef0a8a0b99f853be1eb7e82 / . / src / soc / imgtec / pistachio
tree: 4cbe2b32a4bee8d198f6b88eb3f3ed076db0d945 [path history] [tgz]
  1. include/
  2. bootblock.c
  3. cbmem.c
  4. clocks.c
  5. ddr2_init.c
  6. ddr3_init.c
  7. Kconfig
  8. Makefile.inc
  9. monotonic_timer.c
  10. reset.c
  11. romstage.c
  12. soc.c
  13. spi.c
  14. uart.c