nb/intel/sandybridge: Use or-based logic for RANKSEL
NO_RANKSEL was introduced because it appeared less often and it did not
cause any lines to become too long. To simplify macro transmutation, add
the RANKSEL opposite and keep NO_RANKSEL as a no-op to ease replacement.
Line length limits are not for review. Breaking the lines unnecessarily
complicates search and replace operations, and wil be taken care of in
subsequent commits.
Tested with BUILD_TIMELESS=1, ASUS P8Z77-V LX2 remains unchanged.
Change-Id: I5d7aad59fc79840da7de2e9421b84834a6024eb9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40977
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h
index 4c97bfe..55b3fc5 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.h
+++ b/src/northbridge/intel/sandybridge/raminit_common.h
@@ -25,15 +25,16 @@
#define NUM_SLOTS 2
#define NUM_LANES 9
-#define NO_RANKSEL (~(1 << 16))
-#define IOSAV_MRS (0x1f000)
-#define IOSAV_PRE (0x1f002)
-#define IOSAV_ZQCS (0x1f003)
-#define IOSAV_ACT (0x1f006)
-#define IOSAV_RD (0x1f105)
-#define IOSAV_NOP_ALT (0x1f107)
-#define IOSAV_WR (0x1f201)
-#define IOSAV_NOP (0x1f207)
+#define NO_RANKSEL (~0)
+#define RANKSEL (1 << 16)
+#define IOSAV_MRS (0xf000)
+#define IOSAV_PRE (0xf002)
+#define IOSAV_ZQCS (0xf003)
+#define IOSAV_ACT (0xf006)
+#define IOSAV_RD (0xf105)
+#define IOSAV_NOP_ALT (0xf107)
+#define IOSAV_WR (0xf201)
+#define IOSAV_NOP (0xf207)
/* FIXME: Vendor BIOS uses 64 but our algorithms are less
performant and even 1 seems to be enough in practice. */