diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index f16be2c..3710104 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -39,7 +39,7 @@
 	if (!dev)
 		return current;
 
-	pciexbar_reg=pci_read_config32(dev, PCIEXBAR);
+	pciexbar_reg = pci_read_config32(dev, PCIEXBAR);
 
 	// MMCFG not supported or not enabled.
 	if (!(pciexbar_reg & (1 << 0)))
diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl
index e3c7d11..2565851 100644
--- a/src/northbridge/intel/haswell/acpi/hostbridge.asl
+++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl
@@ -144,7 +144,7 @@
 	}
 
 	/*
-	 * Search CPU0 _PSS looking for control=arg0 and then
+	 * Search CPU0 _PSS looking for control = arg0 and then
 	 * return previous P-state entry number for new _PPC
 	 *
 	 * Format of _PSS:
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index ea0bc54..1c7aff9 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -98,7 +98,7 @@
 
 u32 map_oprom_vendev(u32 vendev)
 {
-	u32 new_vendev=vendev;
+	u32 new_vendev = vendev;
 
 	switch (vendev) {
 	case 0x80860402:		/* GT1 Desktop */
@@ -116,7 +116,7 @@
 	case 0x8086042a:		/* GT3 Server */
 	case 0x80860a26:		/* GT3 ULT */
 
-		new_vendev=0x80860406;	/* GT1 Mobile */
+		new_vendev = 0x80860406;	/* GT1 Mobile */
 		break;
 	}