diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 551714a..bbe8ac4 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -17,6 +17,9 @@
 	select NO_DDR2
 	select USE_DDR3
 
+config CHIPSET_DEVICETREE
+	default "northbridge/intel/sandybridge/chipset.cb"
+
 config SANDYBRIDGE_VBOOT_IN_ROMSTAGE
 	bool
 	default n
diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb
new file mode 100644
index 0000000..ae02a5b
--- /dev/null
+++ b/src/northbridge/intel/sandybridge/chipset.cb
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip northbridge/intel/sandybridge
+	device cpu_cluster 0 on
+		chip cpu/intel/model_206ax
+			# Magic APIC ID to locate this chip
+			device lapic 0 on end
+			device lapic 0xacac off end
+
+			register "acpi_c1" = "1"	# ACPI(C1) = MWAIT(C1)
+			register "acpi_c2" = "3"	# ACPI(C2) = MWAIT(C3)
+			register "acpi_c3" = "5"	# ACPI(C3) = MWAIT(C7)
+		end
+	end
+
+	device domain 0 on
+	end
+end