commit 688257409330b9d12455c6997b0f57f128cd207b
author Kyösti Mälkki <kyosti.malkki@gmail.com> Tue Oct 27 14:31:18 2015 +0200
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Mon Nov 02 03:26:09 2015 +0100
tree b9020af4edfe73977d818d78715d198c095d6b69
parent d28474b46d69e683e26443f295ae4a626d7c3b38

asrock/e350m1: Add ACPI S3 support

To store memory configuration in SPI flash currently adds
some 150 ms delay in ramstage, visible in timestamps listing
at 75:cbmem post.

Change-Id: I1160259054b58e9a8df2a105c730e0f4140be1f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/12215
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/mainboard/asrock/e350m1/buildOpts.c

diff --git a/src/mainboard/asrock/e350m1/buildOpts.c b/src/mainboard/asrock/e350m1/buildOpts.c
index 041e1dd..140ece4 100644
--- a/src/mainboard/asrock/e350m1/buildOpts.c
+++ b/src/mainboard/asrock/e350m1/buildOpts.c
@@ -115,7 +115,7 @@
 #define AGESA_ENTRY_INIT_LATE                     TRUE
 #define AGESA_ENTRY_INIT_S3SAVE                   TRUE
 #define AGESA_ENTRY_INIT_RESUME                   TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE             FALSE
+#define AGESA_ENTRY_INIT_LATE_RESTORE             TRUE
 #define AGESA_ENTRY_INIT_GENERAL_SERVICES         FALSE
 
 /*
@@ -187,7 +187,7 @@
 //#define BLDCFG_USE_HT_ASSIST                    TRUE
 //#define BLDCFG_USE_ATM_MODE                     TRUE
 //#define BLDCFG_PLATFORM_CONTROL_FLOW_MODE       Nfcm
-#define BLDCFG_S3_LATE_RESTORE                    FALSE
+#define BLDCFG_S3_LATE_RESTORE                    TRUE
 //#define BLDCFG_USE_32_BYTE_REFRESH              FALSE
 //#define BLDCFG_USE_VARIABLE_MCT_ISOC_PRIORITY   FALSE
 //#define BLDCFG_PLATFORM_POWER_POLICY_MODE       Performance