sb,soc/intel: Replace set_ioapic_id() with setup_ioapic()

This adds delivery of PIC/i8259 interrupts via ExtNMI on the
affected platfoms.

Change-Id: If99e321fd9b153101d71e1b995b43dba48d8763f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c
index a3de7ac..b68a8cf 100644
--- a/src/soc/intel/broadwell/pch/lpc.c
+++ b/src/soc/intel/broadwell/pch/lpc.c
@@ -33,7 +33,7 @@
 	/* PCH-LP has 40 redirection entries */
 	ioapic_set_max_vectors(VIO_APIC_VADDR, 40);
 
-	set_ioapic_id(VIO_APIC_VADDR, 0x02);
+	setup_ioapic(VIO_APIC_VADDR, 0x02);
 }
 
 static void enable_hpet(struct device *dev)
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index 43434df..1393714 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -283,7 +283,7 @@
 	/* affirm full set of redirection table entries ("write once") */
 	ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
 
-	set_ioapic_id((void *)IO_APIC_ADDR, 0x02);
+	setup_ioapic((void *)IO_APIC_ADDR, 0x02);
 }
 
 static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = {
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index f0a7058..0fcaeb1 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -34,7 +34,7 @@
 	/* affirm full set of redirection table entries ("write once") */
 	ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
 
-	set_ioapic_id((void *)IO_APIC_ADDR, IO_APIC0);
+	setup_ioapic((void *)IO_APIC_ADDR, IO_APIC0);
 }
 
 /* interrupt router lookup for internal devices */