mb/intel/tglrvp: Update Power Limit2 minimum value
Update Power Limit2 (PL2) minimum value to the same as maximum value.
DTT does not throttle PL2, so this minimum value change here does not
impact any existing behavior on the system.
BUG=None
BRANCH=None
TEST=Build and test on tglrvp system
Change-Id: I6bbbfa8e43a241df721b91425294983c1d561f2c
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index ce7c3d9..4e3d2e79 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -191,7 +191,7 @@
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 200,}"
register "controls.power_limits.pl2" = "{
- .min_power = 15000,
+ .min_power = 60000,
.max_power = 60000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,