* drop reset files from 945 mainboards (and use southbridge specific reset)
* drop debug.c files from 945 mainboards (and share it in the northbridge code)
* adapt the mainboard and auto.c files for above changes.
Rather trivial
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/mainboard/intel/d945gclf/auto.c b/src/mainboard/intel/d945gclf/auto.c
index e0c4c52..8d1dc16 100644
--- a/src/mainboard/intel/d945gclf/auto.c
+++ b/src/mainboard/intel/d945gclf/auto.c
@@ -20,6 +20,10 @@
// __PRE_RAM__ means: use "unsigned" for device, not a struct.
#define __PRE_RAM__
+/* Configuration of the i945 driver */
+#define CHIPSET_I945GC 1
+#define CHANNEL_XOR_RANDOMIZATION 1
+
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
@@ -45,7 +49,6 @@
#include "lib/ramtest.c"
#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
-#include "reset.c"
#include "superio/smsc/lpc47m15x/lpc47m15x_early_serial.c"
#include "northbridge/intel/i945/udelay.c"
@@ -77,12 +80,11 @@
return smbus_read_byte(device, address);
}
-#define CHANNEL_XOR_RANDOMIZATION 1
#include "northbridge/intel/i945/raminit.h"
#include "northbridge/intel/i945/raminit.c"
#include "northbridge/intel/i945/reset_test.c"
#include "northbridge/intel/i945/errata.c"
-#include "debug.c"
+#include "northbridge/intel/i945/debug.c"
static void ich7_enable_lpc(void)
{