| commit | 66c52ffb2bed60a9002755b5cf7f40ef25b3a1a2 | [log] [tgz] |
|---|---|---|
| author | Raul E Rangel <rrangel@chromium.org> | Fri Apr 02 10:18:25 2021 -0600 |
| committer | Raul Rangel <rrangel@chromium.org> | Mon Apr 05 15:02:10 2021 +0000 |
| tree | 43d88d77e2ddcd0a6ba37b14b48974a2b8428b87 | |
| parent | b92383a8a5adc3be5a18477c559badad3de01af8 [diff] |
soc/amd/common/espi: Clear DNCMD_COMPLETE on completion Tidy up the interrupt status. This will leave SLAVE0_INT_STS = 0. BUG=b:183524609 TEST=Boot guybrush to OS Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I950cfb81521e35758c120a482670cfdb924201d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52056 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index fe49fe8..c7269d0 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c
@@ -519,6 +519,8 @@ return -1; } + espi_write32(ESPI_SLAVE0_INT_STS, ESPI_STATUS_DNCMD_COMPLETE); + return 0; }