nb/intel/sandybridge: Use new fixed BAR accessors
One instance in northbridge.c breaks reproduciblity when changed.
Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 remains identical.
Change-Id: I2148183827bcacc9e6edb91b26ad35eb2dae5090
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51866
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c
index 26c5306..96bfb37 100644
--- a/src/northbridge/intel/sandybridge/finalize.c
+++ b/src/northbridge/intel/sandybridge/finalize.c
@@ -18,19 +18,19 @@
pci_or_config32(HOST_BRIDGE, TSEGMB, 1 << 0);
pci_or_config32(HOST_BRIDGE, TOLUD, 1 << 0);
- MCHBAR32_OR(PAVP_MSG, 1 << 0); /* PAVP */
- MCHBAR32_OR(SAPMCTL, 1 << 31); /* SA PM */
- MCHBAR32_OR(UMAGFXCTL, 1 << 0); /* UMA GFX */
- MCHBAR32_OR(VTDTRKLCK, 1 << 0); /* VTDTRK */
- MCHBAR32_OR(REQLIM, 1 << 31);
- MCHBAR32_OR(DMIVCLIM, 1 << 31);
- MCHBAR32_OR(CRDTLCK, 1 << 0);
+ mchbar_setbits32(PAVP_MSG, 1 << 0); /* PAVP */
+ mchbar_setbits32(SAPMCTL, 1 << 31); /* SA PM */
+ mchbar_setbits32(UMAGFXCTL, 1 << 0); /* UMA GFX */
+ mchbar_setbits32(VTDTRKLCK, 1 << 0); /* VTDTRK */
+ mchbar_setbits32(REQLIM, 1 << 31);
+ mchbar_setbits32(DMIVCLIM, 1 << 31);
+ mchbar_setbits32(CRDTLCK, 1 << 0);
/* Memory Controller Lockdown */
- MCHBAR8(MC_LOCK) = 0x8f;
+ mchbar_write8(MC_LOCK, 0x8f);
/* Read+write the following */
- MCHBAR32(VDMBDFBARKVM) = MCHBAR32(VDMBDFBARKVM);
- MCHBAR32(VDMBDFBARPAVP) = MCHBAR32(VDMBDFBARPAVP);
- MCHBAR32(HDAUDRID) = MCHBAR32(HDAUDRID);
+ mchbar_setbits32(VDMBDFBARKVM, 0);
+ mchbar_setbits32(VDMBDFBARPAVP, 0);
+ mchbar_setbits32(HDAUDRID, 0);
}