tree 196b212d8b461b6cd0dbeadcd25fb272ab5079a3
parent ecaa2d4741696ab0228500fd170e58ee4d268353
author Felix Singer <felix.singer@secunet.com> 1586162725 +0200
committer Nico Huber <nico.h@gmx.de> 1586258113 +0000

sb/intel/bd82x6x/sata: Don't hard-code values

The interrupt line registers are configured in a central place,
pch_pirq_init() in `lpc.c`, according to the PIRQ configuration.
Hardcoding values here makes no sense.

Change-Id: Ide5f101b2e5bda84f3c2ff8c8ca636b8233bb948
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>