commit 65fe21f1c96a0762ba764fe47c8dc1d9cb7ee217
author Robert Zieba <robertzieba@google.com> Wed Aug 17 12:48:06 2022 -0600
committer Martin L Roth <gaumless@gmail.com> Thu Aug 25 00:49:52 2022 +0000
tree 7f7ac5d0a680d9bb0d2d3507ca810dac6d653617
parent c4d77128c515e51b907877505a05cf50e254465c

util/apcb/apcb_v3_edit: Add support for LP5X SDRAM

This commit adds support for LP5X SDRAM.

BUG=b:242765117
TEST=Ran with LP5X SPDs and manually patched APCB

Signed-off-by: Robert Zieba <robertzieba@google.com>
Change-Id: I2d3cb9c9a1523cb4c5149ede1c96a16c3991a5d0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66840
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

util/apcb/apcb_v3_edit.py

diff --git a/util/apcb/apcb_v3_edit.py b/util/apcb/apcb_v3_edit.py
index 140b232..e6b8506 100755
--- a/util/apcb/apcb_v3_edit.py
+++ b/util/apcb/apcb_v3_edit.py
@@ -15,9 +15,11 @@
 # Byte 1 = 0x11 = Revision 1.1
 # Byte 2 = 0x11 = LPDDR4X SDRAM
 #        = 0x13 = LP5 SDRAM
+#        = 0x15 = LP5X SDRAM
 # Byte 3 = 0x0E = Non-DIMM Solution
 LP4_SPD_MAGIC = bytes.fromhex('2311110E')
 LP5_SPD_MAGIC = bytes.fromhex('2311130E')
+LP5X_SPD_MAGIC = bytes.fromhex('2311150E')
 EMPTY_SPD = b'\x00' * 512
 
 spd_ssp_struct_fmt = '??B?IIBBBxIIBBBx'
@@ -53,7 +55,7 @@
         '--mem_type',
         type=str,
         default='lp4',
-        help='Memory type [lp4|lp5]. Default = lp4')
+        help='Memory type [lp4|lp5|lp5x]. Default = lp4')
     return parser.parse_args()
 
 
@@ -86,6 +88,8 @@
 
     if args.mem_type == 'lp5':
         spd_magic = LP5_SPD_MAGIC
+    elif args.mem_type == 'lp5x':
+        spd_magic = LP5X_SPD_MAGIC
 
     spds = []
     for spd_source in args.spd_sources: