nb/intel/pineview: Guard DMIBAR/EPBAR macro parameters
Add brackets around the parameters to avoid operation order problems.
Tested with BUILD_TIMELESS=1, Foxconn D41S remains identical.
Change-Id: I347466f56d3d5fb3793b3a25e4a825c844e50d42
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/northbridge/intel/pineview/pineview.h b/src/northbridge/intel/pineview/pineview.h
index 19b9584..03fa318 100644
--- a/src/northbridge/intel/pineview/pineview.h
+++ b/src/northbridge/intel/pineview/pineview.h
@@ -59,17 +59,17 @@
* EPBAR - Egress Port Root Complex Register Block
*/
-#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + x))
-#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + x))
-#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + x))
+#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + (x)))
+#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + (x)))
+#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + (x)))
/*
* DMIBAR
*/
-#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + x))
-#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + x))
-#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + x))
+#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + (x)))
+#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + (x)))
+#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + (x)))
enum fsb_clk {
FSB_CLOCK_667MHz = 0,