diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index eec90bc..7801b0d 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -1,5 +1,4 @@
 chip soc/intel/apollolake
-	device cpu_cluster 0 on end
 
 	register "pcie_rp_clkreq_pin[2]" = "3"    # wifi/bt
 	# Disable unused clkreq of PCIe root ports
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index 2199ac0..d24e67b 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "pcie_rp_clkreq_pin[0]" = "0"    # wifi/bt
 	# Disable unused clkreq of PCIe root ports
 	register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb
index 7052497..f162519 100644
--- a/src/mainboard/google/reef/variants/coral/devicetree.cb
+++ b/src/mainboard/google/reef/variants/coral/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "pcie_rp_clkreq_pin[0]" = "0"    # wifi/bt
 	# Disable unused clkreq of PCIe root ports
 	register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb
index bf40464..79da9fd 100644
--- a/src/mainboard/google/reef/variants/pyro/devicetree.cb
+++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "pcie_rp_clkreq_pin[0]" = "0"    # wifi/bt
 	# Disable unused clkreq of PCIe root ports
 	register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
diff --git a/src/mainboard/google/reef/variants/sand/devicetree.cb b/src/mainboard/google/reef/variants/sand/devicetree.cb
index 1ee9c38..45007f0 100644
--- a/src/mainboard/google/reef/variants/sand/devicetree.cb
+++ b/src/mainboard/google/reef/variants/sand/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "pcie_rp_clkreq_pin[0]" = "0"    # wifi/bt
 	# Disable unused clkreq of PCIe root ports
 	register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb
index 7c775ef..ec9ea9c 100644
--- a/src/mainboard/google/reef/variants/snappy/devicetree.cb
+++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "pcie_rp_clkreq_pin[0]" = "0"    # wifi/bt
 	# Disable unused clkreq of PCIe root ports
 	register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
diff --git a/src/mainboard/intel/apollolake_rvp/devicetree.cb b/src/mainboard/intel/apollolake_rvp/devicetree.cb
index ef361b0..a983807 100644
--- a/src/mainboard/intel/apollolake_rvp/devicetree.cb
+++ b/src/mainboard/intel/apollolake_rvp/devicetree.cb
@@ -7,8 +7,6 @@
 	register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
 	register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
 
-	device cpu_cluster 0 on end
-
 	device domain 0 on
 		device pci 00.0 on end	# - Host Bridge
 		device pci 00.1 on end	# - DPTF
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index 45fb736..551fc60 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED"
 	# Disable unused clkreq of PCIe root ports
 	register "pcie_rp_clkreq_pin[1]" = "3" # wifi/bt
diff --git a/src/mainboard/intel/leafhill/devicetree.cb b/src/mainboard/intel/leafhill/devicetree.cb
index add83fe..0a152b6 100644
--- a/src/mainboard/intel/leafhill/devicetree.cb
+++ b/src/mainboard/intel/leafhill/devicetree.cb
@@ -7,8 +7,6 @@
 	register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
 	register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
 
-	device cpu_cluster 0 on end
-
 	device domain 0 on
 		device pci 00.0 on end	# - Host Bridge
 		device pci 00.1 on end	# - DPTF
diff --git a/src/mainboard/intel/minnow3/devicetree.cb b/src/mainboard/intel/minnow3/devicetree.cb
index add83fe..0a152b6 100644
--- a/src/mainboard/intel/minnow3/devicetree.cb
+++ b/src/mainboard/intel/minnow3/devicetree.cb
@@ -7,8 +7,6 @@
 	register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
 	register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
 
-	device cpu_cluster 0 on end
-
 	device domain 0 on
 		device pci 00.0 on end	# - Host Bridge
 		device pci 00.1 on end	# - DPTF
diff --git a/src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb b/src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb
index e77a172..b3f9a6e 100644
--- a/src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb
+++ b/src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb
@@ -2,8 +2,6 @@
 
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	# Override USB port configuration
 	register "usb_config_override" = "1"
 	# USB 2.0
diff --git a/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
index 7ce2480..a2a9df4 100644
--- a/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
+++ b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
@@ -5,7 +5,6 @@
 	register "enable_vtd" = "1"
 	register "dptf_enable" = "1"
 
-	device cpu_cluster 0 on end
 	device domain 0 on
 		device pci 00.0 on  end # Host Bridge
 		device pci 00.1 on  end # DPTF
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
index dad319e..a08f053 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "sci_irq" = "SCIS_IRQ10"
 
 	# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
index b728438..b515170 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "sci_irq" = "SCIS_IRQ10"
 
 	# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
index 4fae59e..56d93aa 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "sci_irq" = "SCIS_IRQ10"
 
 	# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
index 586d65e..1c5f797 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "sci_irq" = "SCIS_IRQ10"
 
 	# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
index 40739df..92bba65 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "sci_irq" = "SCIS_IRQ10"
 
 	# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
index c48eb5a..8223f68 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "sci_irq" = "SCIS_IRQ10"
 
 	# 0:HS400(Default), 1:HS200, 2:DDR50
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb
index ce716a0..0a080c3 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/apollolake
 
-	device cpu_cluster 0 on end
-
 	register "sci_irq" = "SCIS_IRQ10"
 
 	# EMMC TX DATA Delay 1
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
index 709d8e1..f1ace5a 100644
--- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
@@ -1,5 +1,4 @@
 chip soc/intel/apollolake
-	device cpu_cluster 0 on end
 
 	# Graphics
 	# TODO:
diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
index 96011ea..71932a6 100644
--- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
@@ -1,5 +1,4 @@
 chip soc/intel/apollolake
-	device cpu_cluster 0 on end
 
 	# Graphics
 	# TODO:
diff --git a/src/mainboard/up/squared/devicetree.cb b/src/mainboard/up/squared/devicetree.cb
index 867f3a5..4b0d5f7 100644
--- a/src/mainboard/up/squared/devicetree.cb
+++ b/src/mainboard/up/squared/devicetree.cb
@@ -20,7 +20,6 @@
 	# 0:HS400 (Default) 1:HS200 2:DDR50
 	register "emmc_host_max_speed" = "1"
 
-	device cpu_cluster 0 on end
 	device domain 0 on
 		subsystemid 0x8086 0x7270 inherit
 		device pci 00.0 on end	# - Host Bridge
diff --git a/src/soc/intel/apollolake/chipset_apl.cb b/src/soc/intel/apollolake/chipset_apl.cb
index 8a1b501..b4f1659 100644
--- a/src/soc/intel/apollolake/chipset_apl.cb
+++ b/src/soc/intel/apollolake/chipset_apl.cb
@@ -1,4 +1,5 @@
 chip soc/intel/apollolake
+	device cpu_cluster 0 on end
 	device domain 0 on
 		device pci 00.0 alias system_agent	on	end # Host Bridge
 		device pci 00.1 alias dptf		on	end # DPTF
diff --git a/src/soc/intel/apollolake/chipset_glk.cb b/src/soc/intel/apollolake/chipset_glk.cb
index 0043630..07eecf5 100644
--- a/src/soc/intel/apollolake/chipset_glk.cb
+++ b/src/soc/intel/apollolake/chipset_glk.cb
@@ -1,4 +1,5 @@
 chip soc/intel/apollolake
+	device cpu_cluster 0 on end
 	device domain 0 on
 		device pci 00.0 alias system_agent	on	end # Host Bridge
 		device pci 00.1 alias dptf		on	end # DPTF