compiler.h: add __weak macro
Instead of writing out '__attribute__((weak))' use a shorter form.
Change-Id: If418a1d55052780077febd2d8f2089021f414b91
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index 36b669b..f72810f 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -18,6 +18,7 @@
#include <cpu/x86/mtrr.h>
#include <cbfs.h>
#include <cbmem.h>
+#include <compiler.h>
#include <delay.h>
#include <rules.h>
#include <rmodule.h>
@@ -28,8 +29,8 @@
#include <amdblocks/BiosCallOuts.h>
#include <soc/southbridge.h>
-void __attribute__((weak)) SetMemParams(AMD_POST_PARAMS *PostParams) {}
-void __attribute__((weak)) OemPostParams(AMD_POST_PARAMS *PostParams) {}
+void __weak SetMemParams(AMD_POST_PARAMS *PostParams) {}
+void __weak OemPostParams(AMD_POST_PARAMS *PostParams) {}
/* ACPI table pointers returned by AmdInitLate */
static void *DmiTable;
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index fec1776..d419fcf 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -15,6 +15,7 @@
*/
#include <cbfs.h>
+#include <compiler.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <timer.h>
@@ -155,7 +156,7 @@
return pVbiosImageInfo->ImagePtr ? AGESA_SUCCESS : AGESA_WARNING;
}
-AGESA_STATUS __attribute__((weak)) platform_PcieSlotResetControl(UINT32 Func,
+AGESA_STATUS __weak platform_PcieSlotResetControl(UINT32 Func,
UINTN Data, VOID *ConfigPtr)
{
printk(BIOS_WARNING, "Warning - AGESA callout: %s not supported\n",
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index f30ed3c..c6eef1a 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <amdblocks/BiosCallOuts.h>
@@ -28,7 +29,7 @@
#include "chip.h"
#include <amdblocks/car.h>
-void __attribute__((weak)) platform_FchParams_reset(
+void __weak platform_FchParams_reset(
FCH_RESET_DATA_BLOCK *FchParams_reset) {}
AGESA_STATUS agesa_fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
@@ -159,7 +160,7 @@
}
/* Allow mainboards to fill the SPD buffer */
-__attribute__((weak)) int mainboard_read_spd(uint8_t spdAddress, char *buf,
+__weak int mainboard_read_spd(uint8_t spdAddress, char *buf,
size_t len)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 6c9726a..0e019f7 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -17,6 +17,7 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/acpi.h>
+#include <compiler.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
@@ -34,7 +35,7 @@
#include <soc/southbridge.h>
#include <amdblocks/psp.h>
-void __attribute__((weak)) mainboard_romstage_entry(int s3_resume)
+void __weak mainboard_romstage_entry(int s3_resume)
{
/* By default, don't do anything */
}
diff --git a/src/soc/amd/stoneyridge/usb.c b/src/soc/amd/stoneyridge/usb.c
index 0665976..e6d608e 100644
--- a/src/soc/amd/stoneyridge/usb.c
+++ b/src/soc/amd/stoneyridge/usb.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -42,13 +43,13 @@
}
}
-int __attribute__((weak)) mainboard_get_xhci_oc_map(uint16_t *map)
+int __weak mainboard_get_xhci_oc_map(uint16_t *map)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
return -1;
}
-int __attribute__((weak)) mainboard_get_ehci_oc_map(uint16_t *map)
+int __weak mainboard_get_ehci_oc_map(uint16_t *map)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
return -1;
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index c563f54..e4084fe 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -20,6 +20,7 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/mp.h>
@@ -518,7 +519,7 @@
sizeof(silconfig->PcieRpSelectableDeemphasis));
}
-void __attribute__((weak)) mainboard_devtree_update(struct device *dev)
+void __weak mainboard_devtree_update(struct device *dev)
{
/* Override dev tree settings per board */
}
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index a8a0dd1..3d695ea 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -24,6 +24,7 @@
#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <device/pci_def.h>
@@ -370,13 +371,13 @@
car_set_var(fsp_version, version);
}
-__attribute__((weak))
+__weak
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-__attribute__((weak))
+__weak
void mainboard_save_dimm_info(void)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c
index 57ad0a7..5da5104 100644
--- a/src/soc/intel/baytrail/gpio.c
+++ b/src/soc/intel/baytrail/gpio.c
@@ -14,6 +14,7 @@
*/
#include <device/pci.h>
+#include <compiler.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <soc/pmc.h>
@@ -234,7 +235,7 @@
}
}
-struct soc_gpio_config* __attribute__((weak)) mainboard_get_gpios(void)
+struct soc_gpio_config* __weak mainboard_get_gpios(void)
{
printk(BIOS_DEBUG, "Default/empty GPIO config\n");
return NULL;
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index d16c4ff..84ae0ee 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -19,6 +19,7 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
@@ -536,7 +537,7 @@
.device = LPC_DEVID,
};
-int __attribute__((weak)) mainboard_get_spi_config(struct spi_config *cfg)
+int __weak mainboard_get_spi_config(struct spi_config *cfg)
{
return -1;
}
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 9ac5574c..a672f7f 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -22,6 +22,7 @@
#include <arch/smp/mpspec.h>
#include <cbfs.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/intel/turbo.h>
@@ -552,6 +553,6 @@
}
}
-__attribute__((weak)) void acpi_create_serialio_ssdt(acpi_header_t *ssdt)
+__weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt)
{
}
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index 1f68e84..3da5763 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -15,6 +15,7 @@
*/
#include <chip.h>
+#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -81,7 +82,7 @@
}
}
-__attribute__((weak)) void board_silicon_USB2_override(SILICON_INIT_UPD *params)
+__weak void board_silicon_USB2_override(SILICON_INIT_UPD *params)
{
}
diff --git a/src/soc/intel/braswell/gpio.c b/src/soc/intel/braswell/gpio.c
index a742f73..23be45a 100644
--- a/src/soc/intel/braswell/gpio.c
+++ b/src/soc/intel/braswell/gpio.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-
+#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <soc/gpio.h>
@@ -305,7 +305,7 @@
printk(BIOS_DEBUG, "Tri-state TDO and TMS\n");
}
-__attribute__((weak)) struct soc_gpio_config *mainboard_get_gpios(void)
+__weak struct soc_gpio_config *mainboard_get_gpios(void)
{
printk(BIOS_DEBUG, "Default/empty GPIO config\n");
return NULL;
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 6eb61c7..05fa855 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -21,6 +21,7 @@
#include <bootstate.h>
#include <cbmem.h>
#include "chip.h"
+#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
@@ -457,7 +458,7 @@
.device = LPC_DEVID,
};
-int __attribute__((weak)) mainboard_get_spi_config(struct spi_config *cfg)
+int __weak mainboard_get_spi_config(struct spi_config *cfg)
{
printk(BIOS_SPEW, "%s/%s ( 0x%p )\n",
__FILE__, __func__, (void *)cfg);
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 4a1e67d..025855b 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -20,6 +20,7 @@
#include <arch/cbfs.h>
#include <arch/early_variables.h>
#include <bootmode.h>
+#include <compiler.h>
#include <console/console.h>
#include <cbfs.h>
#include <cbmem.h>
@@ -123,4 +124,4 @@
;
}
-void __attribute__((weak)) mainboard_pre_console_init(void) {}
+void __weak mainboard_pre_console_init(void) {}
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 5fc3a55..49b98ee 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -14,6 +14,7 @@
*/
#include <chip.h>
+#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -307,7 +308,7 @@
}
/* Mainboard GPIO Configuration */
-__attribute__((weak)) void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+__weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index c8cb927..0459095 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -19,6 +19,7 @@
#include <chip.h>
#include <cpu/x86/mtrr.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
#include <intelblocks/cse.h>
@@ -194,7 +195,7 @@
mainboard_memory_init_params(mupd);
}
-__attribute__((weak)) void mainboard_memory_init_params(FSPM_UPD *mupd)
+__weak void mainboard_memory_init_params(FSPM_UPD *mupd)
{
/* Do nothing */
}
diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c
index 4166801..e0d8bfb 100644
--- a/src/soc/intel/common/acpi_wake_source.c
+++ b/src/soc/intel/common/acpi_wake_source.c
@@ -16,13 +16,14 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <soc/nvs.h>
#include <stdint.h>
#include <stdlib.h>
#include "acpi.h"
-__attribute__((weak)) int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
+__weak int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
{
return -1;
}
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index bf4003d..02ab886 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -18,6 +18,7 @@
#include <arch/smp/mpspec.h>
#include <bootstate.h>
#include <cbmem.h>
+#include <compiler.h>
#include <cpu/intel/reset.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/msr.h>
@@ -100,7 +101,7 @@
return acpi_madt_irq_overrides(current);
}
-__attribute__ ((weak)) void soc_fill_fadt(acpi_fadt_t *fadt)
+__weak void soc_fill_fadt(acpi_fadt_t *fadt)
{
}
@@ -173,7 +174,7 @@
return acpi_write_hpet(device, current, rsdp);
}
-__attribute__ ((weak))
+__weak
uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en,
const struct chipset_power_state *ps)
{
@@ -219,7 +220,7 @@
return GPE0_REG_MAX;
}
-__attribute__ ((weak)) void acpi_create_gnvs(struct global_nvs_t *gnvs)
+__weak void acpi_create_gnvs(struct global_nvs_t *gnvs)
{
}
@@ -401,7 +402,7 @@
acpigen_write_TSS_package(entries, soc_tss_table);
}
-__attribute__ ((weak)) void soc_power_states_generation(int core_id,
+__weak void soc_power_states_generation(int core_id,
int cores_per_package)
{
}
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 085a340..23f2fb0 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -16,6 +16,7 @@
#include <arch/io.h>
#include <assert.h>
#include <bootstate.h>
+#include <compiler.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
@@ -30,12 +31,12 @@
static const void *microcode_patch;
/* SoC override function */
-__attribute__((weak)) void soc_core_init(device_t dev)
+__weak void soc_core_init(device_t dev)
{
/* no-op */
}
-__attribute__((weak)) void soc_init_cpus(struct bus *cpu_bus)
+__weak void soc_init_cpus(struct bus *cpu_bus)
{
/* no-op */
}
diff --git a/src/soc/intel/common/block/ebda/ebda.c b/src/soc/intel/common/block/ebda/ebda.c
index d16ad6e..41c77a8 100644
--- a/src/soc/intel/common/block/ebda/ebda.c
+++ b/src/soc/intel/common/block/ebda/ebda.c
@@ -14,6 +14,7 @@
*/
#include <arch/ebda.h>
+#include <compiler.h>
#include <intelblocks/ebda.h>
#include <string.h>
@@ -24,7 +25,7 @@
*/
/* Fill up EBDA structure inside Mainboard directory */
-__attribute__((weak)) void create_mainboard_ebda(struct ebda_config *cfg)
+__weak void create_mainboard_ebda(struct ebda_config *cfg)
{
/* no-op */
}
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index dcf8200..ddea99f 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -21,7 +22,7 @@
#include <soc/pci_devs.h>
/* SoC Overrides */
-__attribute__((weak)) void graphics_soc_init(struct device *dev)
+__weak void graphics_soc_init(struct device *dev)
{
/*
* User needs to implement SoC override in case wishes
diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c
index 175fad8..c7e1c6a 100644
--- a/src/soc/intel/common/block/gspi/gspi.c
+++ b/src/soc/intel/common/block/gspi/gspi.c
@@ -17,6 +17,7 @@
#include <arch/early_variables.h>
#include <arch/io.h>
#include <assert.h>
+#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
@@ -357,7 +358,7 @@
return 0;
}
-int __attribute__((weak)) gspi_get_soc_spi_cfg(unsigned int gspi_bus,
+int __weak gspi_get_soc_spi_cfg(unsigned int gspi_bus,
struct spi_cfg *cfg)
{
cfg->clk_phase = SPI_CLOCK_PHASE_FIRST;
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 079ecde..c462d9d 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -24,13 +25,13 @@
/* SoC overrides */
/* Common weak definition, needs to be implemented in each soc LPC driver. */
-__attribute__((weak)) void lpc_soc_init(struct device *dev)
+__weak void lpc_soc_init(struct device *dev)
{
/* no-op */
}
/* Fill up LPC IO resource structure inside SoC directory */
-__attribute__((weak)) void pch_lpc_soc_fill_io_resources(struct device *dev)
+__weak void pch_lpc_soc_fill_io_resources(struct device *dev)
{
/* no-op */
}
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index d3fef55..c8e8026 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -15,6 +15,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
@@ -25,7 +26,7 @@
/* SoC overrides */
/* Fill up PMC resource structure inside SoC directory */
-__attribute__((weak)) int pmc_soc_get_resources(
+__weak int pmc_soc_get_resources(
struct pmc_resource_config *cfg)
{
/* no-op */
@@ -33,7 +34,7 @@
}
/* SoC override PMC initialization */
-__attribute__((weak)) void pmc_soc_init(struct device *dev)
+__weak void pmc_soc_init(struct device *dev)
{
/* no-op */
}
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index cf87d05..38d4196 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -16,6 +16,7 @@
#include <arch/early_variables.h>
#include <arch/io.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <halt.h>
#include <intelblocks/pmclib.h>
@@ -75,7 +76,7 @@
}
}
-__attribute__ ((weak)) uint32_t soc_get_smi_status(uint32_t generic_sts)
+__weak uint32_t soc_get_smi_status(uint32_t generic_sts)
{
return generic_sts;
}
@@ -84,7 +85,7 @@
* Set PMC register to know which state system should be after
* power reapplied
*/
-__attribute__ ((weak)) void pmc_soc_restore_power_failure(void)
+__weak void pmc_soc_restore_power_failure(void)
{
/*
* SoC code should set PMC config register in order to set
@@ -332,7 +333,7 @@
pmc_clear_gpi_gpe_status();
}
-__attribute__ ((weak))
+__weak
void soc_clear_pm_registers(uintptr_t pmc_bar)
{
}
@@ -351,7 +352,7 @@
soc_clear_pm_registers(pmc_bar);
}
-__attribute__ ((weak))
+__weak
int soc_prev_sleep_state(const struct chipset_power_state *ps,
int prev_sleep_state)
{
diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c
index 9e76768..cb97953 100644
--- a/src/soc/intel/common/block/rtc/rtc.c
+++ b/src/soc/intel/common/block/rtc/rtc.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <intelblocks/pcr.h>
#include <intelblocks/rtc.h>
#include <soc/pcr_ids.h>
@@ -31,7 +32,7 @@
pcr_or32(PID_RTC, PCR_RTC_CONF, PCR_RTC_CONF_UCMOS_EN);
}
-__attribute__((weak)) int soc_get_rtc_failed(void)
+__weak int soc_get_rtc_failed(void)
{
return 0;
}
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index d492459..d8ac2f3 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -16,6 +16,7 @@
#include <arch/hlt.h>
#include <arch/io.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
@@ -40,18 +41,18 @@
/* SoC overrides. */
/* Specific SOC SMI handler during ramstage finalize phase */
-__attribute__((weak)) void smihandler_soc_at_finalize(void)
+__weak void smihandler_soc_at_finalize(void)
{
return;
}
-__attribute__((weak)) int smihandler_soc_disable_busmaster(device_t dev)
+__weak int smihandler_soc_disable_busmaster(device_t dev)
{
return 1;
}
/* SMI handlers that should be serviced in SCI mode too. */
-__attribute__((weak)) uint32_t smihandler_soc_get_sci_mask(void)
+__weak uint32_t smihandler_soc_get_sci_mask(void)
{
return 0; /* No valid SCI mask for SMI handler */
}
@@ -60,7 +61,7 @@
* Needs to implement the mechanism to know if an illegal attempt
* has been made to write to the BIOS area.
*/
-__attribute__((weak)) void smihandler_soc_check_illegal_access(
+__weak void smihandler_soc_check_illegal_access(
uint32_t tco_sts)
{
return;
@@ -68,13 +69,13 @@
/* Mainboard overrides. */
-__attribute__((weak)) void mainboard_smi_gpi_handler(
+__weak void mainboard_smi_gpi_handler(
const struct gpi_status *sts)
{
return;
}
-__attribute__((weak)) void mainboard_smi_espi_handler(void)
+__weak void mainboard_smi_espi_handler(void)
{
return;
}
diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c
index 49367e1..9028952 100644
--- a/src/soc/intel/common/block/sram/sram.c
+++ b/src/soc/intel/common/block/sram/sram.c
@@ -14,13 +14,14 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <intelblocks/sram.h>
#include <soc/iomap.h>
-__attribute__((weak)) void soc_sram_init(struct device *dev) { /* no-op */ }
+__weak void soc_sram_init(struct device *dev) { /* no-op */ }
static void sram_read_resources(struct device *dev)
{
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 25b4773..54646c9 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -15,6 +15,7 @@
#include <arch/io.h>
#include <cbmem.h>
+#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -25,25 +26,25 @@
#include "systemagent_def.h"
/* SoC override function */
-__attribute__((weak)) void soc_systemagent_init(struct device *dev)
+__weak void soc_systemagent_init(struct device *dev)
{
/* no-op */
}
-__attribute__((weak)) void soc_add_fixed_mmio_resources(struct device *dev,
+__weak void soc_add_fixed_mmio_resources(struct device *dev,
int *resource_cnt)
{
/* no-op */
}
-__attribute__((weak)) int soc_get_uncore_prmmr_base_and_mask(uint64_t *base,
+__weak int soc_get_uncore_prmmr_base_and_mask(uint64_t *base,
uint64_t *mask)
{
/* return failure for this dummy API */
return -1;
}
-__attribute__((weak)) size_t soc_reserved_mmio_size(void)
+__weak size_t soc_reserved_mmio_size(void)
{
return 0;
}
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 9f26ef1..cdbe56b 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -14,6 +14,7 @@
*/
#include <arch/acpi.h>
+#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
@@ -45,7 +46,7 @@
uart_lpss_init(baseaddr);
}
-__attribute__((weak)) device_t pch_uart_get_debug_controller(void)
+__weak device_t pch_uart_get_debug_controller(void)
{
/*
* device_t can either be a pointer to struct device (e.g. ramstage) or
@@ -78,12 +79,12 @@
#if ENV_RAMSTAGE
-__attribute__((weak)) void pch_uart_read_resources(struct device *dev)
+__weak void pch_uart_read_resources(struct device *dev)
{
pci_dev_read_resources(dev);
}
-__attribute__((weak)) bool pch_uart_init_debug_controller_on_resume(void)
+__weak bool pch_uart_init_debug_controller_on_resume(void)
{
/* By default, do not initialize controller. */
return false;
diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c
index 07093df..cc42f2c 100644
--- a/src/soc/intel/common/block/xdci/xdci.c
+++ b/src/soc/intel/common/block/xdci/xdci.c
@@ -15,13 +15,14 @@
*/
#include <arch/io.h>
+#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <intelblocks/xdci.h>
#include <security/vboot/vboot_common.h>
-__attribute__((weak)) void soc_xdci_init(struct device *dev) { /* no-op */ }
+__weak void soc_xdci_init(struct device *dev) { /* no-op */ }
/* Only allow xDCI controller in developer mode if VBOOT is enabled */
int xdci_can_enable(void)
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index e5a4f9b..737c8cf 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -14,13 +14,14 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
#include <intelblocks/xhci.h>
-__attribute__((weak)) void soc_xhci_init(struct device *dev) { /* no-op */ }
+__weak void soc_xhci_init(struct device *dev) { /* no-op */ }
static struct device_operations usb_xhci_ops = {
.read_resources = &pci_dev_read_resources,
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c
index eba7d40..3d8f2bf 100644
--- a/src/soc/intel/common/vbt.c
+++ b/src/soc/intel/common/vbt.c
@@ -14,6 +14,7 @@
*/
#include <cbfs.h>
+#include <compiler.h>
#include <console/console.h>
#include <arch/acpi.h>
#include <bootmode.h>
@@ -23,7 +24,7 @@
#define VBT_SIGNATURE 0x54425624
-__attribute__((weak))
+__weak
const char *mainboard_vbt_filename(void)
{
return "vbt.bin";
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 7386db3..1071ab5 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -19,6 +19,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
+#include <compiler.h>
#include <cpu/x86/smm.h>
#include <string.h>
#include <device/pci.h>
@@ -329,4 +330,4 @@
}
}
-__attribute__((weak)) void acpi_create_serialio_ssdt(acpi_header_t *ssdt) {}
+__weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt) {}
diff --git a/src/soc/intel/denverton_ns/fiamux.c b/src/soc/intel/denverton_ns/fiamux.c
index 36b8223..418ccfa 100644
--- a/src/soc/intel/denverton_ns/fiamux.c
+++ b/src/soc/intel/denverton_ns/fiamux.c
@@ -15,6 +15,7 @@
*
*/
+#include <compiler.h>
#include <console/console.h>
#include <soc/fiamux.h>
@@ -140,7 +141,7 @@
return fiamux_hob_data;
}
-__attribute__((weak)) size_t mainboard_get_hsio_config(BL_HSIO_INFORMATION **p_hsio_config)
+__weak size_t mainboard_get_hsio_config(BL_HSIO_INFORMATION **p_hsio_config)
{
*p_hsio_config = NULL;
return 0;
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index f675933..b57ffc4 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -15,6 +15,7 @@
*/
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <reset.h>
@@ -28,7 +29,7 @@
#include <soc/smm.h>
#include <soc/soc_util.h>
-void __attribute__((weak)) mainboard_config_gpios(void) {}
+void __weak mainboard_config_gpios(void) {}
#define FSP_SMBIOS_MEMORY_INFO_GUID \
{ \
@@ -279,7 +280,7 @@
}
}
-__attribute__((weak)) void mainboard_memory_init_params(FSPM_UPD *mupd)
+__weak void mainboard_memory_init_params(FSPM_UPD *mupd)
{
/* Do nothing */
}
diff --git a/src/soc/intel/fsp_baytrail/gpio.c b/src/soc/intel/fsp_baytrail/gpio.c
index 862e42b..72cf158 100644
--- a/src/soc/intel/fsp_baytrail/gpio.c
+++ b/src/soc/intel/fsp_baytrail/gpio.c
@@ -14,6 +14,7 @@
*/
#include <device/pci.h>
+#include <compiler.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <soc/pmc.h>
@@ -245,7 +246,7 @@
}
-struct soc_gpio_config* __attribute__((weak)) mainboard_get_gpios(void)
+struct soc_gpio_config* __weak mainboard_get_gpios(void)
{
printk(BIOS_DEBUG, "Default/empty GPIO config\n");
return NULL;
diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c
index d5543b8..1a9c5ae 100644
--- a/src/soc/intel/quark/gpio_i2c.c
+++ b/src/soc/intel/quark/gpio_i2c.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
@@ -23,7 +24,7 @@
#include <soc/ramstage.h>
#include <soc/reg_access.h>
-__attribute__((weak)) void mainboard_gpio_i2c_init(device_t dev)
+__weak void mainboard_gpio_i2c_init(device_t dev)
{
/* Initialize any of the GPIOs or I2C devices */
printk(BIOS_SPEW, "WEAK; mainboard_gpio_i2c_init\n");
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 3d133f9..914b9d5 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -23,6 +23,7 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <chip.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
@@ -707,7 +708,7 @@
return GPE0_REG_MAX;
}
-__attribute__((weak)) void acpi_mainboard_gnvs(global_nvs_t *gnvs)
+__weak void acpi_mainboard_gnvs(global_nvs_t *gnvs)
{
}
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 054ed08..6e91816 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -20,6 +20,7 @@
#include <fsp/api.h>
#include <arch/acpi.h>
#include <chip.h>
+#include <compiler.h>
#include <bootstate.h>
#include <console/console.h>
#include <device/device.h>
@@ -346,7 +347,7 @@
}
/* Mainboard GPIO Configuration */
-__attribute__((weak)) void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+__weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 0b2d276..760dcc1e 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -18,6 +18,7 @@
#include <arch/io.h>
#include <arch/symbols.h>
#include <assert.h>
+#include <compiler.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cbmem.h>
@@ -295,7 +296,7 @@
memory_cfg->SaGv = 0x02;
}
-__attribute__((weak)) void mainboard_memory_init_params(FSPM_UPD *mupd)
+__weak void mainboard_memory_init_params(FSPM_UPD *mupd)
{
/* Do nothing */
}
diff --git a/src/soc/nvidia/tegra210/bootblock.c b/src/soc/nvidia/tegra210/bootblock.c
index 3d4e881..4d1ddf5 100644
--- a/src/soc/nvidia/tegra210/bootblock.c
+++ b/src/soc/nvidia/tegra210/bootblock.c
@@ -17,6 +17,7 @@
#include <arch/hlt.h>
#include <arch/stages.h>
#include <bootblock_common.h>
+#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <program_loading.h>
@@ -50,7 +51,7 @@
}
}
-void __attribute__((weak)) bootblock_mainboard_early_init(void)
+void __weak bootblock_mainboard_early_init(void)
{
/* Empty default implementation. */
}
diff --git a/src/soc/nvidia/tegra210/funitcfg.c b/src/soc/nvidia/tegra210/funitcfg.c
index a26da86..e8d0c97 100644
--- a/src/soc/nvidia/tegra210/funitcfg.c
+++ b/src/soc/nvidia/tegra210/funitcfg.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <compiler.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/funitcfg.h>
@@ -175,7 +176,7 @@
}
}
-void __attribute__((weak)) usb_setup_utmip(void *usb_base)
+void __weak usb_setup_utmip(void *usb_base)
{
/* default empty implementation required if usb.c is not included */
printk(BIOS_ERR, "USB setup is not supported in current stage\n");
diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c
index 8fb839d..8958a6b 100644
--- a/src/soc/nvidia/tegra210/romstage.c
+++ b/src/soc/nvidia/tegra210/romstage.c
@@ -17,6 +17,7 @@
#include <arch/stages.h>
#include <cbfs.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/cbmem_console.h>
#include <console/console.h>
#include <lib.h>
@@ -33,7 +34,7 @@
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
-void __attribute__((weak)) romstage_mainboard_init(void)
+void __weak romstage_mainboard_init(void)
{
/* Default empty implementation. */
}