commit 63bb610abb9ffa244a6571132813388a485141c9
author Gabe Black <gabeblack@google.com> Wed Jun 19 03:29:45 2013 -0700
committer Stefan Reinauer <stefan.reinauer@coreboot.org> Wed Jul 10 22:42:51 2013 +0200
tree 0869d5f1b1b636525afada3da8635260201bc954
parent fdd2356b5766e0e8a95b54d1d56f5c9340c95832

pit: Replace the snow GPIO indexes with ones for pit.

The GPIOs used by vboot and setting up the display and backlight were still
the ones for snow. This change updates them so they're correct for pit.

Change-Id: I06ba773da3af249efec723bb90c2e9e8075a777a
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3689
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/mainboard/google/pit/chromeos.c

diff --git a/src/mainboard/google/pit/chromeos.c b/src/mainboard/google/pit/chromeos.c
index 349ba1d..ae219bb 100644
--- a/src/mainboard/google/pit/chromeos.c
+++ b/src/mainboard/google/pit/chromeos.c
@@ -36,9 +36,9 @@
 	int count = 0;
 
 	/* Write Protect: active low */
-	gpios->gpios[count].port = EXYNOS5_GPD1;
+	gpios->gpios[count].port = EXYNOS5_GPX3;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_value(GPIO_D16); // WP_GPIO
+	gpios->gpios[count].value = gpio_get_value(GPIO_X30); // WP_GPIO
 	strncpy((char *)gpios->gpios[count].name, "write protect",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -54,7 +54,7 @@
 	/* Lid: active high */
 	gpios->gpios[count].port = EXYNOS5_GPX3;
 	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_value(GPIO_X35); // LID_GPIO
+	gpios->gpios[count].value = gpio_get_value(GPIO_X34); // LID_GPIO
 	strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
 	count++;
 
@@ -62,7 +62,7 @@
 	gpios->gpios[count].port = EXYNOS5_GPX1;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
 	gpios->gpios[count].value =
-		gpio_get_value(GPIO_X13); // POWER_GPIO
+		gpio_get_value(GPIO_X12); // POWER_GPIO
 	strncpy((char *)gpios->gpios[count].name, "power",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -91,7 +91,7 @@
 	uint32_t ec_events;
 
 	/* The GPIO is active low. */
-	if (!gpio_get_value(GPIO_Y10)) // RECMODE_GPIO
+	if (!gpio_get_value(GPIO_X07)) // RECMODE_GPIO
 		return 1;
 
 	ec_events = google_chromeec_get_events_b();

src/mainboard/google/pit/mainboard.c

diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index f0df039..1608788 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -49,9 +49,11 @@
 };
 
 /* TODO: transplanted DP stuff, clean up once we have something that works */
-static enum exynos5_gpio_pin dp_pd_l = GPIO_Y25;	/* active low */
-static enum exynos5_gpio_pin dp_rst_l = GPIO_X15;	/* active low */
-static enum exynos5_gpio_pin dp_hpd = GPIO_X07;		/* active high */
+static enum exynos5_gpio_pin dp_pd_l = GPIO_X35;	/* active low */
+static enum exynos5_gpio_pin dp_rst_l = GPIO_Y77;	/* active low */
+static enum exynos5_gpio_pin dp_hpd = GPIO_X26;		/* active high */
+static enum exynos5_gpio_pin bl_pwm = GPIO_B20;		/* active high */
+static enum exynos5_gpio_pin bl_en = GPIO_X22;		/* active high */
 
 static void exynos_dp_bridge_setup(void)
 {
@@ -115,14 +117,14 @@
 static void backlight_pwm(void)
 {
 	/*Configure backlight PWM as a simple output high (100% brightness) */
-	gpio_direction_output(GPIO_B20, 1);
+	gpio_direction_output(bl_pwm, 1);
 	udelay(LCD_T6_DELAY_MS * 1000);
 }
 
 static void backlight_en(void)
 {
 	/* Configure GPIO for LCD_BL_EN */
-	gpio_direction_output(GPIO_X30, 1);
+	gpio_direction_output(bl_en, 1);
 }
 
 //static struct video_info smdk5420_dp_config = {

src/mainboard/google/pit/romstage.c

diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index 001d8cf..41b64b2 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -129,17 +129,17 @@
 
 static void setup_gpio(void)
 {
-	gpio_direction_input(GPIO_D16); // WP_GPIO
-	gpio_set_pull(GPIO_D16, GPIO_PULL_NONE);
+	gpio_direction_input(GPIO_X30); // WP_GPIO
+	gpio_set_pull(GPIO_X30, GPIO_PULL_NONE);
 
-	gpio_direction_input(GPIO_Y10); // RECMODE_GPIO
-	gpio_set_pull(GPIO_Y10, GPIO_PULL_NONE);
+	gpio_direction_input(GPIO_X07); // RECMODE_GPIO
+	gpio_set_pull(GPIO_X07, GPIO_PULL_NONE);
 
-	gpio_direction_input(GPIO_X35); // LID_GPIO
-	gpio_set_pull(GPIO_X35, GPIO_PULL_NONE);
+	gpio_direction_input(GPIO_X34); // LID_GPIO
+	gpio_set_pull(GPIO_X34, GPIO_PULL_NONE);
 
-	gpio_direction_input(GPIO_X13); // POWER_GPIO
-	gpio_set_pull(GPIO_X13, GPIO_PULL_NONE);
+	gpio_direction_input(GPIO_X12); // POWER_GPIO
+	gpio_set_pull(GPIO_X12, GPIO_PULL_NONE);
 }
 
 static void setup_memory(struct mem_timings *mem, int is_resume)