commit 624bf72709423d72acda107ed6d00b945068268d
author Angel Pons <th3fanbus@gmail.com> Sat Nov 05 09:08:49 2022 +0100
committer Eric Lai <eric_lai@quanta.corp-partner.google.com> Mon Nov 07 02:29:09 2022 +0000
tree db3ab9177880545ee0b20fd56b7506b4789b3b6a
parent 6ec48057d0f64c4595758df166dc80fb4ae84ba2

soc/intel/cannonlake: Fix GPIO reset mapping

According to document 337348-001 (Intel® 300 Series and Intel® C240
Series Chipset Family Platform Controller Hub Datasheet - Volume 2
of 2), the only GPIOs that support PWROK reset are those in the GPD
group. The mappings themselves are correct, but they're assigned to
the wrong communities.

Change-Id: Ib586c987f768ddff31b053f4c108a8526326a7dc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69214
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>

src/soc/intel/cannonlake/gpio_cnp_h.c

diff --git a/src/soc/intel/cannonlake/gpio_cnp_h.c b/src/soc/intel/cannonlake/gpio_cnp_h.c
index a9035ed..0074cbf 100644
--- a/src/soc/intel/cannonlake/gpio_cnp_h.c
+++ b/src/soc/intel/cannonlake/gpio_cnp_h.c
@@ -11,7 +11,7 @@
 	{ .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 },
 };
 
-static const struct reset_mapping rst_map_com0[] = {
+static const struct reset_mapping rst_map_gpd[] = {
 	{ .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 },
 	{ .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 },
 	{ .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 },
@@ -83,8 +83,8 @@
 		.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
 		.name = "GPP_AB",
 		.acpi_path = "\\_SB.PCI0.GPIO",
-		.reset_map = rst_map_com0,
-		.num_reset_vals = ARRAY_SIZE(rst_map_com0),
+		.reset_map = rst_map,
+		.num_reset_vals = ARRAY_SIZE(rst_map),
 		.groups = cnl_community0_groups,
 		.num_groups = ARRAY_SIZE(cnl_community0_groups),
 	},
@@ -127,8 +127,8 @@
 		.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
 		.name = "GPD",
 		.acpi_path = "\\_SB.PCI0.GPIO",
-		.reset_map = rst_map,
-		.num_reset_vals = ARRAY_SIZE(rst_map),
+		.reset_map = rst_map_gpd,
+		.num_reset_vals = ARRAY_SIZE(rst_map_gpd),
 		.groups = cnl_community2_groups,
 		.num_groups = ARRAY_SIZE(cnl_community2_groups),
 	},