commit 6237175ed5ef29a0e9b82cc7268ca424c5bb44ea
author Angel Pons <th3fanbus@gmail.com> Sat Mar 27 21:13:44 2021 +0100
committer Patrick Georgi <pgeorgi@google.com> Sun May 02 21:56:00 2021 +0000
tree 4f60ba095f7716baa777e7b93305c16418915d4a
parent 9fa141898e49a844864cfc00f1ddc4c4e1981c2a

nb/intel/haswell: Uniformize include guards

Remove leading and trailing underscores and change `RAMINIT_H` to be
more consistent with other headers.

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.

Change-Id: Ie20fcaa0f9393eb0a34054eda53b9bade63cc0d2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51890
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/intel/haswell/memmap.h

diff --git a/src/northbridge/intel/haswell/memmap.h b/src/northbridge/intel/haswell/memmap.h
index 02bdecc..1aa2d67 100644
--- a/src/northbridge/intel/haswell/memmap.h
+++ b/src/northbridge/intel/haswell/memmap.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#ifndef __NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H__
-#define __NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H__
+#ifndef NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H
+#define NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H
 
 #define GFXVT_BASE_ADDRESS	0xfed90000ULL
 #define GFXVT_BASE_SIZE		0x1000
@@ -9,4 +9,4 @@
 #define VTVC0_BASE_ADDRESS	0xfed91000ULL
 #define VTVC0_BASE_SIZE		0x1000
 
-#endif /* __NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H__ */
+#endif /* NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H */