soc/amd: Make espi_configure_decodes private
This is only ever called after espi_setup.
55861 - AMD System Peripheral Bus Overview also says that io ranges
should be configured before enabling the BUS_MASTER bit.
BUG=b:183524609
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I074e487d8768a578ee889a125b9948e3aa6c7269
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index acd2a7a..0e351a9 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -70,6 +70,5 @@
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
espi_clear_decodes();
espi_setup();
- espi_configure_decodes();
}
}
diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h
index 7ca5b05..f5e7d31 100644
--- a/src/soc/amd/common/block/include/amdblocks/espi.h
+++ b/src/soc/amd/common/block/include/amdblocks/espi.h
@@ -101,12 +101,6 @@
int espi_open_mmio_window(uint32_t base, size_t size);
/*
- * Configure generic and standard I/O decode windows using the espi_config structure settings
- * provided by mainboard in device tree.
- */
-void espi_configure_decodes(void);
-
-/*
* Clear all configured eSPI memory and I/O decode ranges. This is useful for changing
* the decodes, or if something else has previously setup decode windows that conflict
* with the windows that coreboot needs.
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c
index c7269d0..0b690b8 100644
--- a/src/soc/amd/common/block/lpc/espi_util.c
+++ b/src/soc/amd/common/block/lpc/espi_util.c
@@ -298,19 +298,22 @@
return &soc_cfg->espi_config;
}
-void espi_configure_decodes(void)
+static int espi_configure_decodes(const struct espi_config *cfg)
{
- int i;
- const struct espi_config *cfg = espi_get_config();
+ int i, ret;
espi_enable_decode(cfg->std_io_decode_bitmap);
for (i = 0; i < ESPI_GENERIC_IO_WIN_COUNT; i++) {
if (cfg->generic_io_range[i].size == 0)
continue;
- espi_open_generic_io_window(cfg->generic_io_range[i].base,
- cfg->generic_io_range[i].size);
+ ret = espi_open_generic_io_window(cfg->generic_io_range[i].base,
+ cfg->generic_io_range[i].size);
+ if (ret)
+ return ret;
}
+
+ return 0;
}
#define ESPI_DN_TX_HDR0 0x00
@@ -966,6 +969,11 @@
return -1;
}
+ if (espi_configure_decodes(cfg) == -1) {
+ printk(BIOS_ERR, "Error: Configuring decodes failed!\n");
+ return -1;
+ }
+
/* Enable subtractive decode if configured */
espi_setup_subtractive_decode(cfg);
diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c
index 63e192f..5f47638 100644
--- a/src/soc/amd/picasso/early_fch.c
+++ b/src/soc/amd/picasso/early_fch.c
@@ -77,8 +77,6 @@
if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
lpc_disable_spi_rom_sharing();
- if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
+ if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
espi_setup();
- espi_configure_decodes();
- }
}
diff --git a/src/soc/amd/picasso/psp_verstage/fch.c b/src/soc/amd/picasso/psp_verstage/fch.c
index e6c70f6..a032bde 100644
--- a/src/soc/amd/picasso/psp_verstage/fch.c
+++ b/src/soc/amd/picasso/psp_verstage/fch.c
@@ -153,8 +153,6 @@
void verstage_soc_init(void)
{
- if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
+ if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
espi_setup();
- espi_configure_decodes();
- }
}