commit 619bb074945bd5acabd0588dcb1371b8c94108d2
author Matt DeVillier <matt.devillier@gmail.com> Sat Jun 18 15:32:39 2022 -0500
committer Felix Held <felix-coreboot@felixheld.de> Wed Jun 22 17:32:19 2022 +0000
tree 74b1e1a22a3b474703187a2687b782a1a419f2d0
parent 7b4643f5fa170d49217ace787bd00fba0b6c1acc

soc/amd/picasso/acpi: Add missing UART resources

Both UART and DMA MMIO regions for each UART are mapped by the
UEFI reference code, so do the same here.

Without these defined, UART-attached devices fail to correctly
initialize under Windows.

Change-Id: I0e1af9028c7c1746407e923cebe824a15aeb565e
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65233
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/soc/amd/picasso/acpi/sb_fch.asl

diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl
index cbea9d9..bc14930 100644
--- a/src/soc/amd/picasso/acpi/sb_fch.asl
+++ b/src/soc/amd/picasso/acpi/sb_fch.asl
@@ -107,6 +107,7 @@
 				Exclusive, , , IRQR)
 			{ 0 }
 			Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000)
+			Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000)
 		}
 		CreateDWordField (Local0, IRQR._INT, IRQN)
 		If (PICM) {
@@ -117,6 +118,7 @@
 		If (IRQN == 0x1f) {
 			Return (ResourceTemplate() {
 				Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000)
+				Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000)
 			})
 		} Else {
 			Return (Local0)
@@ -138,6 +140,7 @@
 				Exclusive, , , IRQR)
 			{ 0 }
 			Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000)
+			Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000)
 		}
 		CreateDWordField (Local0, IRQR._INT, IRQN)
 		If (PICM) {
@@ -148,6 +151,7 @@
 		If (IRQN == 0x1f) {
 			Return (ResourceTemplate() {
 				Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000)
+				Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000)
 			})
 		} Else {
 			Return (Local0)
@@ -169,6 +173,7 @@
 				Exclusive, , , IRQR)
 			{ 0 }
 			Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000)
+			Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000)
 		}
 		CreateDWordField (Local0, IRQR._INT, IRQN)
 		If (PICM) {
@@ -179,6 +184,7 @@
 		If (IRQN == 0x1f) {
 			Return (ResourceTemplate() {
 				Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000)
+				Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000)
 			})
 		} Else {
 			Return (Local0)
@@ -200,6 +206,7 @@
 				Exclusive, , , IRQR)
 			{ 0 }
 			Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000)
+			Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000)
 		}
 		CreateDWordField (Local0, IRQR._INT, IRQN)
 		If (PICM) {
@@ -210,6 +217,7 @@
 		If (IRQN == 0x1f) {
 			Return (ResourceTemplate() {
 				Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000)
+				Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000)
 			})
 		} Else {
 			Return (Local0)