diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c
index 818e4d8..ada0e92 100644
--- a/src/soc/amd/cezanne/cpu.c
+++ b/src/soc/amd/cezanne/cpu.c
@@ -7,6 +7,7 @@
 #include <assert.h>
 #include <console/console.h>
 #include <cpu/amd/microcode.h>
+#include <cpu/amd/mtrr.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/mtrr.h>
@@ -31,7 +32,11 @@
  */
 static void pre_mp_init(void)
 {
-	x86_setup_mtrrs_with_detect_no_above_4gb();
+	const msr_t syscfg = rdmsr(SYSCFG_MSR);
+	if (syscfg.lo & SYSCFG_MSR_TOM2WB)
+		x86_setup_mtrrs_with_detect_no_above_4gb();
+	else
+		x86_setup_mtrrs_with_detect();
 	x86_mtrr_check();
 }
 
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index f14ee49..d3e80eb 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -1,24 +1,25 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <acpi/acpi.h>
 #include <amdblocks/cpu.h>
 #include <amdblocks/mca.h>
 #include <amdblocks/reset.h>
 #include <amdblocks/smm.h>
 #include <assert.h>
-#include <cpu/cpu.h>
-#include <cpu/x86/mp.h>
-#include <cpu/x86/mtrr.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/smm.h>
-#include <acpi/acpi.h>
-#include <device/device.h>
-#include <device/pci_ops.h>
-#include <soc/pci_devs.h>
-#include <soc/cpu.h>
-#include <soc/smi.h>
-#include <soc/iomap.h>
 #include <console/console.h>
 #include <cpu/amd/microcode.h>
+#include <cpu/amd/mtrr.h>
+#include <cpu/cpu.h>
+#include <cpu/x86/mp.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/smm.h>
+#include <device/device.h>
+#include <device/pci_ops.h>
+#include <soc/cpu.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+#include <soc/smi.h>
 #include <types.h>
 
 _Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of "
@@ -35,7 +36,11 @@
  */
 static void pre_mp_init(void)
 {
-	x86_setup_mtrrs_with_detect_no_above_4gb();
+	const msr_t syscfg = rdmsr(SYSCFG_MSR);
+	if (syscfg.lo & SYSCFG_MSR_TOM2WB)
+		x86_setup_mtrrs_with_detect_no_above_4gb();
+	else
+		x86_setup_mtrrs_with_detect();
 	x86_mtrr_check();
 }
 
diff --git a/src/soc/amd/sabrina/cpu.c b/src/soc/amd/sabrina/cpu.c
index addbf7e..462fb0d 100644
--- a/src/soc/amd/sabrina/cpu.c
+++ b/src/soc/amd/sabrina/cpu.c
@@ -9,6 +9,7 @@
 #include <assert.h>
 #include <console/console.h>
 #include <cpu/amd/microcode.h>
+#include <cpu/amd/mtrr.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/mtrr.h>
@@ -33,7 +34,11 @@
  */
 static void pre_mp_init(void)
 {
-	x86_setup_mtrrs_with_detect_no_above_4gb();
+	const msr_t syscfg = rdmsr(SYSCFG_MSR);
+	if (syscfg.lo & SYSCFG_MSR_TOM2WB)
+		x86_setup_mtrrs_with_detect_no_above_4gb();
+	else
+		x86_setup_mtrrs_with_detect();
 	x86_mtrr_check();
 }
 
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 3cd3a95..e691a51 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -3,20 +3,21 @@
 #include <amdblocks/mca.h>
 #include <amdblocks/reset.h>
 #include <amdblocks/smm.h>
+#include <console/console.h>
 #include <cpu/amd/msr.h>
+#include <cpu/amd/mtrr.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mp.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
+#include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
-#include <soc/pci_devs.h>
 #include <soc/cpu.h>
-#include <soc/northbridge.h>
-#include <soc/smi.h>
 #include <soc/iomap.h>
-#include <console/console.h>
+#include <soc/northbridge.h>
+#include <soc/pci_devs.h>
+#include <soc/smi.h>
 #include <types.h>
 
 /*
@@ -32,7 +33,11 @@
  */
 static void pre_mp_init(void)
 {
-	x86_setup_mtrrs_with_detect();
+	const msr_t syscfg = rdmsr(SYSCFG_MSR);
+	if (syscfg.lo & SYSCFG_MSR_TOM2WB)
+		x86_setup_mtrrs_with_detect_no_above_4gb();
+	else
+		x86_setup_mtrrs_with_detect();
 	x86_mtrr_check();
 }