| commit | 600fa266bdc8740126420e63579a5b9d103ca960 | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Mon Nov 07 08:04:59 2022 +0100 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Wed Nov 09 14:30:12 2022 +0000 |
| tree | b824384794084eae2d4ebd7ff774cbc4bfb41999 | |
| parent | 58955be0aab666dc40f7c0f9e31966cc605e2c12 [diff] [blame] |
nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree Change-Id: I955274bc6bda587201f130762c0735c36f5501d1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69289 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb b/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb index ae720e8..ef4668c 100644 --- a/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb +++ b/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb
@@ -14,12 +14,14 @@ }" register "ec_present" = "true" device cpu_cluster 0 on + ops haswell_cpu_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end end end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x17aa 0x2211 inherit device pci 00.0 on end # Host bridge