tree 9281c27d5e93f511e8269e29eb4fb2a50c24e29d
parent 334be3289d6ca16e806bd1e2aef87637cebb3122
author Lijian Zhao <lijian.zhao@intel.com> 1545958869 -0800
committer Patrick Georgi <pgeorgi@google.com> 1546545000 +0000

soc/intel/cannonlake: Add cannonlake ACPI GPIO op

Follow instrcution from https://doc.coreboot.org/acpi/gpio.html to
implement GPIO toggling method, covered for both CNP_LP and CNP_H pch.

BUG=N/A
TEST=Build and boot up fine on sarien platform, add an dummy STSX in
DSDT table, read back from iotools to confirm the GPIO tx state get
updated.

Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I006a6a8fc580c73ac0938968397a628a4ffe504f
Reviewed-on: https://review.coreboot.org/c/30461
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>