mainboards using soc/amd/picasso: use aliases for remaining PCIe devices
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id2bdce5871f57e9edb17f89cba61b5c5ae018566
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
diff --git a/src/mainboard/amd/bilby/devicetree.cb b/src/mainboard/amd/bilby/devicetree.cb
index 10a5d2e..932d280 100644
--- a/src/mainboard/amd/bilby/devicetree.cb
+++ b/src/mainboard/amd/bilby/devicetree.cb
@@ -145,19 +145,19 @@
device ref gpp_bridge_1 on end
device ref gpp_bridge_4 on end # NVMe
device ref internal_bridge_a on
- device pci 0.0 on end # Internal GPU
- device pci 0.1 on end # Display HDA
- device pci 0.2 on end # Crypto Coprocessor
- device pci 0.3 on end # USB 3.1
- device pci 0.4 off end # USB 3.1
- device pci 0.5 on end # Audio
- device pci 0.6 on end # HDA
- device pci 0.7 on end # non-Sensor Fusion Hub device
+ device ref gfx on end # Internal GPU
+ device ref gfx_hda on end # Display HDA
+ device ref crypto on end # Crypto Coprocessor
+ device ref xhci_0 on end # USB 3.1
+ device ref xhci_1 off end # USB 3.1
+ device ref acp on end # Audio
+ device ref hda on end # HDA
+ device ref mp2 on end # non-Sensor Fusion Hub device
end
device ref internal_bridge_b on
- device pci 0.0 off end # AHCI
- device pci 0.1 off end # integrated Ethernet MAC
- device pci 0.2 off end # integrated Ethernet MAC
+ device ref sata off end # AHCI
+ device ref xgbe_0 off end # integrated Ethernet MAC
+ device ref xgbe_1 off end # integrated Ethernet MAC
end
device ref lpc_bridge on
chip superio/smsc/sio1036 # optional debug card