sandy/ivybridge: Make UMA size configurable.
Change-Id: I9aa3652d1b92cece01d024e19bdc065797896001
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6470
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index d688f5b..d1d35db 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -24,6 +24,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <elog.h>
+#include <pc80/mc146818rtc.h>
#include "sandybridge.h"
static void sandybridge_setup_bars(void)
@@ -83,6 +84,7 @@
u32 reg32;
u16 reg16;
u8 reg8;
+ u8 gfxsize;
reg16 = pci_read_config16(PCI_DEV(0,2,0), PCI_DEVICE_ID);
switch (reg16) {
@@ -103,10 +105,13 @@
printk(BIOS_DEBUG, "Initializing Graphics...\n");
- /* Setup IGD memory by setting GGC[7:3] = 1 for 32MB */
+ if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) {
+ /* Setup IGD memory by setting GGC[7:3] = 1 for 32MB */
+ gfxsize = 0;
+ }
reg16 = pci_read_config16(PCI_DEV(0,0,0), GGC);
reg16 &= ~0x00f8;
- reg16 |= 1 << 3;
+ reg16 |= (gfxsize + 1) << 3;
/* Program GTT memory by setting GGC[9:8] = 2MB */
reg16 &= ~0x0300;
reg16 |= 2 << 8;