Revert "soc/intel/adl: Select CSE defined ME spec version for alderlake"
This reverts commit 272c9c07bd9c7dcd684614c67487504ce06f7a36.
Reason for revert: Sorry was going to give +2 but pressed the submit
button and accidentally merged this out of train.
Change-Id: I8a2c6407832bdcf3d475209356501f8fc3672f6b
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73213
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index b67b30b..9c5868b 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -105,7 +105,6 @@
select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC
select SOC_INTEL_COMMON_BLOCK_IPU if !SOC_INTEL_ALDERLAKE_PCH_S
select SOC_INTEL_COMMON_BLOCK_IRQ
- select SOC_INTEL_COMMON_BLOCK_ME_SPEC_16
select SOC_INTEL_COMMON_BLOCK_MEMINIT
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_COMMON_BLOCK_PMC_EPOC
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index 943b158..fa52efb 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -33,6 +33,7 @@
ramstage-y += graphics.c
ramstage-y += hsphy.c
ramstage-y += lockdown.c
+ramstage-y += me.c
ramstage-y += p2sb.c
ramstage-y += pcie_rp.c
ramstage-y += pmc.c
diff --git a/src/soc/intel/alderlake/include/soc/me.h b/src/soc/intel/alderlake/include/soc/me.h
new file mode 100644
index 0000000..f029991
--- /dev/null
+++ b/src/soc/intel/alderlake/include/soc/me.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _ALDERLAKE_ME_H_
+#define _ALDERLAKE_ME_H_
+
+/* ME Host Firmware Status register 1 */
+union me_hfsts1 {
+ uint32_t data;
+ struct {
+ uint32_t working_state : 4;
+ uint32_t mfg_mode : 1;
+ uint32_t fpt_bad : 1;
+ uint32_t operation_state : 3;
+ uint32_t fw_init_complete : 1;
+ uint32_t ft_bup_ld_flr : 1;
+ uint32_t update_in_progress : 1;
+ uint32_t error_code : 4;
+ uint32_t operation_mode : 4;
+ uint32_t reserved_0 : 4;
+ uint32_t boot_options_present : 1;
+ uint32_t invoke_enhance_dbg_mode: 1;
+ uint32_t reserved_1 : 5;
+ uint32_t d0i3_support_valid : 1;
+ } __packed fields;
+};
+
+/* Host Firmware Status Register 2 */
+union me_hfsts2 {
+ uint32_t data;
+ struct {
+ uint32_t reserved_0 : 4;
+ uint32_t cpu_replaced : 1;
+ uint32_t reserved_1 : 3;
+ uint32_t cpu_replaced_valid : 1;
+ uint32_t low_power_state : 1;
+ uint32_t reserved_2 : 22;
+ } __packed fields;
+};
+
+/* ME Host Firmware Status Register 3 */
+union me_hfsts3 {
+ uint32_t data;
+ struct {
+ uint32_t reserved_0 : 4;
+ uint32_t fw_sku : 3;
+ uint32_t reserved_1 : 25;
+ } __packed fields;
+};
+
+
+/* Host Firmware Status Register 4 */
+union me_hfsts4 {
+ uint32_t data;
+ struct {
+ uint32_t rsvd0;
+ } __packed fields;
+};
+
+/* Host Firmware Status Register 5 */
+union me_hfsts5 {
+ uint32_t data;
+ struct {
+ uint32_t rsvd0;
+ } __packed fields;
+};
+
+/* Host Firmware Status Register 6 */
+union me_hfsts6 {
+ u32 data;
+ struct {
+ uint32_t reserved_0 : 1;
+ uint32_t cpu_debug_disable : 1;
+ uint32_t reserved_1 : 19;
+ uint32_t manuf_lock : 1;
+ uint32_t reserved_2 : 8;
+ uint32_t fpf_soc_lock : 1;
+ uint32_t txt_support : 1;
+ } __packed fields;
+};
+
+#endif /* _ALDERLAKE_ME_H_ */
diff --git a/src/soc/intel/alderlake/me.c b/src/soc/intel/alderlake/me.c
new file mode 100644
index 0000000..6239eb2
--- /dev/null
+++ b/src/soc/intel/alderlake/me.c
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootstate.h>
+#include <intelblocks/cse.h>
+#include <console/console.h>
+#include <soc/me.h>
+#include <stdint.h>
+
+static bool is_manuf_mode(union me_hfsts1 hfsts1, union me_hfsts6 hfsts6)
+{
+ /*
+ * ME manufacturing mode is disabled if the descriptor is locked, fuses
+ * are programmed and manufacturing variables are locked.
+ */
+ return !((hfsts1.fields.mfg_mode == 0) &&
+ (hfsts6.fields.fpf_soc_lock == 1) &&
+ (hfsts6.fields.manuf_lock == 1));
+}
+
+static void dump_me_status(void *unused)
+{
+ union me_hfsts1 hfsts1;
+ union me_hfsts2 hfsts2;
+ union me_hfsts3 hfsts3;
+ union me_hfsts4 hfsts4;
+ union me_hfsts5 hfsts5;
+ union me_hfsts6 hfsts6;
+ bool manuf_mode;
+
+ if (!is_cse_enabled())
+ return;
+
+ hfsts1.data = me_read_config32(PCI_ME_HFSTS1);
+ hfsts2.data = me_read_config32(PCI_ME_HFSTS2);
+ hfsts3.data = me_read_config32(PCI_ME_HFSTS3);
+ hfsts4.data = me_read_config32(PCI_ME_HFSTS4);
+ hfsts5.data = me_read_config32(PCI_ME_HFSTS5);
+ hfsts6.data = me_read_config32(PCI_ME_HFSTS6);
+
+ printk(BIOS_DEBUG, "ME: HFSTS1 : 0x%08X\n", hfsts1.data);
+ printk(BIOS_DEBUG, "ME: HFSTS2 : 0x%08X\n", hfsts2.data);
+ printk(BIOS_DEBUG, "ME: HFSTS3 : 0x%08X\n", hfsts3.data);
+ printk(BIOS_DEBUG, "ME: HFSTS4 : 0x%08X\n", hfsts4.data);
+ printk(BIOS_DEBUG, "ME: HFSTS5 : 0x%08X\n", hfsts5.data);
+ printk(BIOS_DEBUG, "ME: HFSTS6 : 0x%08X\n", hfsts6.data);
+
+ manuf_mode = is_manuf_mode(hfsts1, hfsts6);
+ printk(BIOS_DEBUG, "ME: Manufacturing Mode : %s\n",
+ manuf_mode ? "YES" : "NO");
+ /*
+ * The SPI Protection Mode bit reflects SPI descriptor
+ * locked(0) or unlocked(1).
+ */
+ printk(BIOS_DEBUG, "ME: SPI Protection Mode Enabled : %s\n",
+ hfsts1.fields.mfg_mode ? "NO" : "YES");
+ printk(BIOS_DEBUG, "ME: FPFs Committed : %s\n",
+ hfsts6.fields.fpf_soc_lock ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: Manufacturing Vars Locked : %s\n",
+ hfsts6.fields.manuf_lock ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n",
+ hfsts1.fields.fpt_bad ? "BAD" : "OK");
+ printk(BIOS_DEBUG, "ME: Bringup Loader Failure : %s\n",
+ hfsts1.fields.ft_bup_ld_flr ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: Firmware Init Complete : %s\n",
+ hfsts1.fields.fw_init_complete ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: Boot Options Present : %s\n",
+ hfsts1.fields.boot_options_present ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: Update In Progress : %s\n",
+ hfsts1.fields.update_in_progress ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: D0i3 Support : %s\n",
+ hfsts1.fields.d0i3_support_valid ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: Low Power State Enabled : %s\n",
+ hfsts2.fields.low_power_state ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: CPU Replaced : %s\n",
+ hfsts2.fields.cpu_replaced ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: CPU Replacement Valid : %s\n",
+ hfsts2.fields.cpu_replaced_valid ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: Current Working State : %u\n",
+ hfsts1.fields.working_state);
+ printk(BIOS_DEBUG, "ME: Current Operation State : %u\n",
+ hfsts1.fields.operation_state);
+ printk(BIOS_DEBUG, "ME: Current Operation Mode : %u\n",
+ hfsts1.fields.operation_mode);
+ printk(BIOS_DEBUG, "ME: Error Code : %u\n",
+ hfsts1.fields.error_code);
+ printk(BIOS_DEBUG, "ME: Enhanced Debug Mode : %s\n",
+ hfsts1.fields.invoke_enhance_dbg_mode ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: CPU Debug Disabled : %s\n",
+ hfsts6.fields.cpu_debug_disable ? "YES" : "NO");
+ printk(BIOS_DEBUG, "ME: TXT Support : %s\n",
+ hfsts6.fields.txt_support ? "YES" : "NO");
+
+ if (CONFIG(SOC_INTEL_CSE_LITE_SKU))
+ cse_log_ro_write_protection_info(manuf_mode);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL);
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME_CHECK, BS_ON_EXIT, dump_me_status, NULL);