sc7280: Enable RECOVERY_MRC_CACHE
Enable caching of memory training data for recovery as well as normal
mode. We had HAS_RECOVERY_MRC_CACHE selected in the sc7280 Kconfig,
but never allocated a RECOVERY_MRC_CACHE in the herobrine fmap so it
never worked. Adding RECOVERY_MRC_CACHE and also removing
RO_DDR_TRAINING, RO_LIMITS_CFG, RW_LIMITS_CFG entries which have been
deprecated.
BUG=b:236995289
BRANCH=None
TEST=run dut-control power_state:rec twice and make sure that
DDR training doesn't run on the second boot.
Change-Id: I39ac7eca4ae94075874324b13c69eef59522e3c5
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65370
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
diff --git a/src/mainboard/google/herobrine/chromeos.fmd b/src/mainboard/google/herobrine/chromeos.fmd
index e85271c..cb56d73 100644
--- a/src/mainboard/google/herobrine/chromeos.fmd
+++ b/src/mainboard/google/herobrine/chromeos.fmd
@@ -10,15 +10,15 @@
GBB 0x2f00
RO_FRID 0x100
}
- RO_VPD(PRESERVE) 228K
- RO_DDR_TRAINING(PRESERVE) 8K
- RO_LIMITS_CFG(PRESERVE) 4K
+ RO_VPD(PRESERVE)
}
RW_VPD(PRESERVE) 32K
RW_NVRAM(PRESERVE) 16K
- RW_MRC_CACHE(PRESERVE) 32K
- RW_LIMITS_CFG(PRESERVE) 4K
+ UNIFIED_MRC_CACHE(PRESERVE) 64K {
+ RECOVERY_MRC_CACHE 32K
+ RW_MRC_CACHE 32K
+ }
RW_ELOG(PRESERVE) 4K
RW_SHARED 4K {
SHARED_DATA