Revert "Remove code that enables/disables VMX in coreboot on chromebooks."
The MSR for VMX can start with a random value and needs to be
cleared by coreboot. I am reverting this change, as
it handles almost everything and doing a follow-on change to fix
the improper clearing of the MSR.
Change-Id: Ibad7a27b03f199241c52c1ebdd2b6d4e81a18a4e
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1793
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 9654af1..47c7707 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -116,6 +116,41 @@
{ 0 }
};
+static void enable_vmx(void)
+{
+ struct cpuid_result regs;
+ msr_t msr;
+ int enable = CONFIG_ENABLE_VMX;
+
+ msr = rdmsr(IA32_FEATURE_CONTROL);
+
+ if (msr.lo & (1 << 0)) {
+ printk(BIOS_ERR, "VMX is locked, so enable_vmx will do nothing\n");
+ /* VMX locked. If we set it again we get an illegal
+ * instruction
+ */
+ return;
+ }
+
+ regs = cpuid(1);
+ printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling");
+ if (regs.ecx & CPUID_VMX) {
+ if (enable)
+ msr.lo |= (1 << 2);
+ else
+ msr.lo &= ~(1 << 2);
+
+ if (regs.ecx & CPUID_SMX) {
+ if (enable)
+ msr.lo |= (1 << 1);
+ else
+ msr.lo &= ~(1 << 1);
+ }
+ }
+
+ wrmsr(IA32_FEATURE_CONTROL, msr);
+}
+
/* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
static const u8 power_limit_time_sec_to_msr[] = {
[0] = 0x00,
@@ -526,6 +561,9 @@
enable_lapic_tpr();
setup_lapic();
+ /* Enable virtualization if enabled in CMOS */
+ enable_vmx();
+
/* Configure C States */
configure_c_states();