tree dd5d67885d1b40669c11a733178bb3d5f8605052
parent 3b0667dd2a386fd13765cb047ef7484ba169a10d
author Julien Viard de Galbert <jviarddegalbert@online.net> 1522324861 +0200
committer Patrick Georgi <pgeorgi@google.com> 1548682410 +0000

soc/intel/denverton_ns: Add ACPI T-States and P-States

Also make soc_get_tss_table public and weak instead of static
in intelblock so it can be overridden in denverton.

Change-Id: Id9c7da474a81417a5cebd875023f7cd3d5a77796
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/c/25430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Vanny E <vanessa.f.eusebio@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Guckian
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>