src/soc: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I9c1228d3f9e7a12fe30c48e3b1f143520fed875c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
diff --git a/src/soc/cavium/cn81xx/twsi.c b/src/soc/cavium/cn81xx/twsi.c
index 7137531..afa98c6 100644
--- a/src/soc/cavium/cn81xx/twsi.c
+++ b/src/soc/cavium/cn81xx/twsi.c
@@ -667,7 +667,7 @@
return 0;
}
-int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments,
+int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments,
int seg_count)
{
int result;
diff --git a/src/soc/imgtec/pistachio/include/soc/gpio.h b/src/soc/imgtec/pistachio/include/soc/gpio.h
index f2427f24..64f2e27 100644
--- a/src/soc/imgtec/pistachio/include/soc/gpio.h
+++ b/src/soc/imgtec/pistachio/include/soc/gpio.h
@@ -16,6 +16,6 @@
#ifndef __SOC_IMGTECH_PISTACHIO_GPIO_H__
#define __SOC_IMGTECH_PISTACHIO_GPIO_H__
-typedef unsigned gpio_t;
+typedef unsigned int gpio_t;
#endif // __SOC_IMGTECH_PISTACHIO_GPIO_H__
diff --git a/src/soc/imgtec/pistachio/monotonic_timer.c b/src/soc/imgtec/pistachio/monotonic_timer.c
index bbcd8a1..3bc65a5 100644
--- a/src/soc/imgtec/pistachio/monotonic_timer.c
+++ b/src/soc/imgtec/pistachio/monotonic_timer.c
@@ -24,7 +24,7 @@
static int get_count_mhz_freq(void)
{
- static unsigned count_mhz_freq;
+ static unsigned int count_mhz_freq;
if (!count_mhz_freq) {
if (IMG_PLATFORM_ID() != IMG_PLATFORM_ID_SILICON)
diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c
index 1eb232a..d5042d5 100644
--- a/src/soc/imgtec/pistachio/uart.c
+++ b/src/soc/imgtec/pistachio/uart.c
@@ -34,12 +34,12 @@
#define UART_SHIFT 2
#define GEN_ACCESSOR(name, idx) \
-static inline uint8_t read_##name(unsigned base_port) \
+static inline uint8_t read_##name(unsigned int base_port) \
{ \
return read8((void *)(base_port + (idx << UART_SHIFT))); \
} \
\
-static inline void write_##name(unsigned base_port, uint8_t val) \
+static inline void write_##name(unsigned int base_port, uint8_t val) \
{ \
write8((void *)(base_port + (idx << UART_SHIFT)), val); \
}
@@ -54,12 +54,12 @@
GEN_ACCESSOR(dll, UART8250_DLL)
GEN_ACCESSOR(dlm, UART8250_DLM)
-static int uart8250_mem_can_tx_byte(unsigned base_port)
+static int uart8250_mem_can_tx_byte(unsigned int base_port)
{
return read_lsr(base_port) & UART8250_LSR_THRE;
}
-static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
+static void uart8250_mem_tx_byte(unsigned int base_port, unsigned char data)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while (i-- && !uart8250_mem_can_tx_byte(base_port))
@@ -67,19 +67,19 @@
write_tbr(base_port, data);
}
-static void uart8250_mem_tx_flush(unsigned base_port)
+static void uart8250_mem_tx_flush(unsigned int base_port)
{
unsigned long int i = FIFO_TIMEOUT;
while (i-- && !(read_lsr(base_port) & UART8250_LSR_TEMT))
udelay(1);
}
-static int uart8250_mem_can_rx_byte(unsigned base_port)
+static int uart8250_mem_can_rx_byte(unsigned int base_port)
{
return read_lsr(base_port) & UART8250_LSR_DR;
}
-static unsigned char uart8250_mem_rx_byte(unsigned base_port)
+static unsigned char uart8250_mem_rx_byte(unsigned int base_port)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while (i-- && !uart8250_mem_can_rx_byte(base_port))
@@ -90,7 +90,7 @@
return 0x0;
}
-static void uart8250_mem_init(unsigned base_port, unsigned divisor)
+static void uart8250_mem_init(unsigned int base_port, unsigned int divisor)
{
/* Disable interrupts */
write_ier(base_port, 0x0);
diff --git a/src/soc/intel/baytrail/include/soc/msr.h b/src/soc/intel/baytrail/include/soc/msr.h
index 5038bf8..825e7f2 100644
--- a/src/soc/intel/baytrail/include/soc/msr.h
+++ b/src/soc/intel/baytrail/include/soc/msr.h
@@ -39,7 +39,7 @@
#define MSR_CPU_THERM_SENS_CFG 0x675
/* Read BCLK from MSR */
-unsigned bus_freq_khz(void);
+unsigned int bus_freq_khz(void);
void set_max_freq(void);
#endif /* _BAYTRAIL_MSR_H_ */
diff --git a/src/soc/intel/baytrail/include/soc/pattrs.h b/src/soc/intel/baytrail/include/soc/pattrs.h
index 7d10cea..7b46345 100644
--- a/src/soc/intel/baytrail/include/soc/pattrs.h
+++ b/src/soc/intel/baytrail/include/soc/pattrs.h
@@ -42,7 +42,7 @@
const void *microcode_patch;
int address_bits;
int num_cpus;
- unsigned bclk_khz;
+ unsigned int bclk_khz;
};
/* This is just to hide the abstraction w/o relying on how the underlying
diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c
index 9636640..3fa5459 100644
--- a/src/soc/intel/baytrail/lpe.c
+++ b/src/soc/intel/baytrail/lpe.c
@@ -42,7 +42,7 @@
#define FIRMWARE_REG_BASE_C0 0x144000
#define FIRMWARE_REG_LENGTH_C0 (FIRMWARE_REG_BASE_C0 + 4)
-static void assign_device_nvs(struct device *dev, u32 *field, unsigned index)
+static void assign_device_nvs(struct device *dev, u32 *field, unsigned int index)
{
struct resource *res;
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 3c0c07f..fb6143e 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -351,7 +351,7 @@
static int place_device_in_d3hot(struct device *dev)
{
- unsigned offset;
+ unsigned int offset;
/* Parts of the HDA block are used for LPE audio as well.
* Therefore assume the HDA will never be put into D3Hot. */
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index 26b717c..e439002 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -76,7 +76,7 @@
uint16_t *optype;
uint32_t *addr;
uint8_t *data;
- unsigned databytes;
+ unsigned int databytes;
uint8_t *status;
uint16_t *control;
uint32_t *bbar;
@@ -140,7 +140,7 @@
{
u8 v = read8((unsigned long)addr);
printk(BIOS_DEBUG, "read %2.2x from %4.4x\n",
- v, ((unsigned) addr & 0xffff) - 0xf020);
+ v, ((unsigned int) addr & 0xffff) - 0xf020);
return v;
}
@@ -148,7 +148,7 @@
{
u16 v = read16((unsigned long)addr);
printk(BIOS_DEBUG, "read %4.4x from %4.4x\n",
- v, ((unsigned) addr & 0xffff) - 0xf020);
+ v, ((unsigned int) addr & 0xffff) - 0xf020);
return v;
}
@@ -156,7 +156,7 @@
{
u32 v = read32((unsigned long)addr);
printk(BIOS_DEBUG, "read %8.8x from %4.4x\n",
- v, ((unsigned) addr & 0xffff) - 0xf020);
+ v, ((unsigned int) addr & 0xffff) - 0xf020);
return v;
}
@@ -164,21 +164,21 @@
{
write8(addr, b);
printk(BIOS_DEBUG, "wrote %2.2x to %4.4x\n",
- b, ((unsigned) addr & 0xffff) - 0xf020);
+ b, ((unsigned int) addr & 0xffff) - 0xf020);
}
static void writew_(u16 b, void *addr)
{
write16(addr, b);
printk(BIOS_DEBUG, "wrote %4.4x to %4.4x\n",
- b, ((unsigned) addr & 0xffff) - 0xf020);
+ b, ((unsigned int) addr & 0xffff) - 0xf020);
}
static void writel_(u32 b, void *addr)
{
write32(addr, b);
printk(BIOS_DEBUG, "wrote %8.8x to %4.4x\n",
- b, ((unsigned) addr & 0xffff) - 0xf020);
+ b, ((unsigned int) addr & 0xffff) - 0xf020);
}
#else /* CONFIG_DEBUG_SPI_FLASH ^^^ enabled vvv NOT enabled */
@@ -285,13 +285,13 @@
uint32_t offset;
} spi_transaction;
-static inline void spi_use_out(spi_transaction *trans, unsigned bytes)
+static inline void spi_use_out(spi_transaction *trans, unsigned int bytes)
{
trans->out += bytes;
trans->bytesout -= bytes;
}
-static inline void spi_use_in(spi_transaction *trans, unsigned bytes)
+static inline void spi_use_in(spi_transaction *trans, unsigned int bytes)
{
trans->in += bytes;
trans->bytesin -= bytes;
diff --git a/src/soc/intel/baytrail/tsc_freq.c b/src/soc/intel/baytrail/tsc_freq.c
index 5b2d135..edc31c1 100644
--- a/src/soc/intel/baytrail/tsc_freq.c
+++ b/src/soc/intel/baytrail/tsc_freq.c
@@ -18,7 +18,7 @@
#include <cpu/x86/tsc.h>
#include <soc/msr.h>
-unsigned bus_freq_khz(void)
+unsigned int bus_freq_khz(void)
{
msr_t clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
switch (clk_info.lo & 0x3) {
@@ -38,7 +38,7 @@
unsigned long tsc_freq_mhz(void)
{
msr_t platform_info;
- unsigned bclk_khz = bus_freq_khz();
+ unsigned int bclk_khz = bus_freq_khz();
if (!bclk_khz)
return 0;
diff --git a/src/soc/intel/fsp_baytrail/include/soc/msr.h b/src/soc/intel/fsp_baytrail/include/soc/msr.h
index b8fe7fe..8edab59 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/msr.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/msr.h
@@ -29,6 +29,6 @@
#define MSR_IACORE_TURBO_VIDS 0x66d
/* Read BCLK from MSR */
-unsigned bus_freq_khz(void);
+unsigned int bus_freq_khz(void);
#endif /* _BAYTRAIL_MSR_H_ */
diff --git a/src/soc/intel/fsp_baytrail/include/soc/pattrs.h b/src/soc/intel/fsp_baytrail/include/soc/pattrs.h
index 7d10cea..7b46345 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/pattrs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/pattrs.h
@@ -42,7 +42,7 @@
const void *microcode_patch;
int address_bits;
int num_cpus;
- unsigned bclk_khz;
+ unsigned int bclk_khz;
};
/* This is just to hide the abstraction w/o relying on how the underlying
diff --git a/src/soc/intel/fsp_baytrail/lpe.c b/src/soc/intel/fsp_baytrail/lpe.c
index 8baba3e..91f8880 100644
--- a/src/soc/intel/fsp_baytrail/lpe.c
+++ b/src/soc/intel/fsp_baytrail/lpe.c
@@ -42,7 +42,7 @@
#define FIRMWARE_REG_BASE_C0 0x144000
#define FIRMWARE_REG_LENGTH_C0 (FIRMWARE_REG_BASE_C0 + 4)
-static void assign_device_nvs(struct device *dev, u32 *field, unsigned index)
+static void assign_device_nvs(struct device *dev, u32 *field, unsigned int index)
{
struct resource *res;
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index a042bb5..59411ec 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -489,7 +489,7 @@
static int place_device_in_d3hot(struct device *dev)
{
- unsigned offset;
+ unsigned int offset;
/* Parts of the HDA block are used for LPE audio as well.
* Therefore assume the HDA will never be put into D3Hot. */
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 0b52ea96..8aa6290 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -76,7 +76,7 @@
uint16_t *optype;
uint32_t *addr;
uint8_t *data;
- unsigned databytes;
+ unsigned int databytes;
uint8_t *status;
uint16_t *control;
} ich_spi_controller;
@@ -266,13 +266,13 @@
uint32_t offset;
} spi_transaction;
-static inline void spi_use_out(spi_transaction *trans, unsigned bytes)
+static inline void spi_use_out(spi_transaction *trans, unsigned int bytes)
{
trans->out += bytes;
trans->bytesout -= bytes;
}
-static inline void spi_use_in(spi_transaction *trans, unsigned bytes)
+static inline void spi_use_in(spi_transaction *trans, unsigned int bytes)
{
trans->in += bytes;
trans->bytesin -= bytes;
diff --git a/src/soc/intel/fsp_baytrail/tsc_freq.c b/src/soc/intel/fsp_baytrail/tsc_freq.c
index 6605575..d31ddd9 100644
--- a/src/soc/intel/fsp_baytrail/tsc_freq.c
+++ b/src/soc/intel/fsp_baytrail/tsc_freq.c
@@ -19,7 +19,7 @@
#include <soc/msr.h>
#include <soc/baytrail.h>
-unsigned bus_freq_khz(void)
+unsigned int bus_freq_khz(void)
{
msr_t clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
switch (clk_info.lo & 0x3) {
@@ -39,7 +39,7 @@
unsigned long tsc_freq_mhz(void)
{
msr_t platform_info;
- unsigned bclk_khz = bus_freq_khz();
+ unsigned int bclk_khz = bus_freq_khz();
if (!bclk_khz)
return 0;
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/smbus.h b/src/soc/intel/fsp_broadwell_de/include/soc/smbus.h
index 0a7dbae..4d9d3e1 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/smbus.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/smbus.h
@@ -40,9 +40,9 @@
#define SMBUS_TIMEOUT (10 * 1000 * 100)
#define SMBUS_SLAVE_ADDR 0x24
-int do_smbus_read_byte(unsigned smbus_base, unsigned device,
- unsigned address);
-int do_smbus_write_byte(unsigned smbus_base, unsigned device,
- unsigned address, unsigned data);
+int do_smbus_read_byte(unsigned int smbus_base, unsigned int device,
+ unsigned int address);
+int do_smbus_write_byte(unsigned int smbus_base, unsigned int device,
+ unsigned int address, unsigned int data);
#endif
diff --git a/src/soc/intel/fsp_broadwell_de/smbus_common.c b/src/soc/intel/fsp_broadwell_de/smbus_common.c
index e179b55..0c5da4f 100644
--- a/src/soc/intel/fsp_broadwell_de/smbus_common.c
+++ b/src/soc/intel/fsp_broadwell_de/smbus_common.c
@@ -31,7 +31,7 @@
static int smbus_wait_until_ready(u16 smbus_base)
{
- unsigned loops = SMBUS_TIMEOUT;
+ unsigned int loops = SMBUS_TIMEOUT;
unsigned char byte;
do {
smbus_delay();
@@ -44,7 +44,7 @@
static int smbus_wait_until_done(u16 smbus_base)
{
- unsigned loops = SMBUS_TIMEOUT;
+ unsigned int loops = SMBUS_TIMEOUT;
unsigned char byte;
do {
smbus_delay();
@@ -55,7 +55,7 @@
return loops ? 0 : -1;
}
-int do_smbus_read_byte(unsigned smbus_base, unsigned device, unsigned address)
+int do_smbus_read_byte(unsigned int smbus_base, unsigned int device, unsigned int address)
{
unsigned char global_status_register;
unsigned char byte;
@@ -101,8 +101,8 @@
return byte;
}
-int do_smbus_write_byte(unsigned smbus_base, unsigned device,
- unsigned address, unsigned data)
+int do_smbus_write_byte(unsigned int smbus_base, unsigned int device,
+ unsigned int address, unsigned int data)
{
unsigned char global_status_register;
diff --git a/src/soc/nvidia/tegra/i2c.c b/src/soc/nvidia/tegra/i2c.c
index c28cd0b..0e9553c 100644
--- a/src/soc/nvidia/tegra/i2c.c
+++ b/src/soc/nvidia/tegra/i2c.c
@@ -138,7 +138,7 @@
return 0;
}
-static int tegra_i2c_request(int bus, unsigned chip, int cont, int restart,
+static int tegra_i2c_request(int bus, unsigned int chip, int cont, int restart,
int read, void *data, int data_len)
{
uint32_t headers[3];
@@ -170,7 +170,7 @@
data, data_len);
}
-static int i2c_transfer_segment(unsigned bus, unsigned chip, int restart,
+static int i2c_transfer_segment(unsigned int bus, unsigned int chip, int restart,
int read, void *buf, int len)
{
const uint32_t max_payload =
@@ -188,7 +188,7 @@
return 0;
}
-int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments, int count)
+int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments, int count)
{
struct i2c_msg *seg = segments;
int i;
@@ -208,7 +208,7 @@
return 0;
}
-void i2c_init(unsigned bus)
+void i2c_init(unsigned int bus)
{
struct tegra_i2c_regs *regs;
diff --git a/src/soc/nvidia/tegra/i2c.h b/src/soc/nvidia/tegra/i2c.h
index 07480c1..a2bf950 100644
--- a/src/soc/nvidia/tegra/i2c.h
+++ b/src/soc/nvidia/tegra/i2c.h
@@ -18,9 +18,9 @@
#include <stdint.h>
-void i2c_init(unsigned bus);
-void tegra_software_i2c_init(unsigned bus);
-void tegra_software_i2c_disable(unsigned bus);
+void i2c_init(unsigned int bus);
+void tegra_software_i2c_init(unsigned int bus);
+void tegra_software_i2c_disable(unsigned int bus);
enum {
/* Word 0 */
@@ -168,6 +168,6 @@
};
check_member(tegra_i2c_regs, config_load, 0x8C);
-extern unsigned g_num_i2c_buses;
+extern unsigned int g_num_i2c_buses;
#endif /* __SOC_NVIDIA_TEGRA_I2C_H__ */
diff --git a/src/soc/nvidia/tegra/software_i2c.c b/src/soc/nvidia/tegra/software_i2c.c
index 50aac8c..e215c02 100644
--- a/src/soc/nvidia/tegra/software_i2c.c
+++ b/src/soc/nvidia/tegra/software_i2c.c
@@ -36,7 +36,7 @@
.sda = GPIO(Z7), .scl = GPIO(Z6)},
};
-static void tegra_set_sda(unsigned bus, int high)
+static void tegra_set_sda(unsigned int bus, int high)
{
if (high)
gpio_input_pullup(pins[bus].sda);
@@ -44,7 +44,7 @@
gpio_output(pins[bus].sda, 0);
}
-static void tegra_set_scl(unsigned bus, int high)
+static void tegra_set_scl(unsigned int bus, int high)
{
if (high)
gpio_input_pullup(pins[bus].scl);
@@ -52,12 +52,12 @@
gpio_output(pins[bus].scl, 0);
}
-static int tegra_get_sda(unsigned bus)
+static int tegra_get_sda(unsigned int bus)
{
return gpio_get(pins[bus].sda);
}
-static int tegra_get_scl(unsigned bus)
+static int tegra_get_scl(unsigned int bus)
{
return gpio_get(pins[bus].scl);
}
@@ -69,7 +69,7 @@
.get_scl = tegra_get_scl,
};
-void tegra_software_i2c_init(unsigned bus)
+void tegra_software_i2c_init(unsigned int bus)
{
software_i2c[bus] = &tegra_ops;
@@ -78,7 +78,7 @@
tegra_set_scl(bus, 1);
}
-void tegra_software_i2c_disable(unsigned bus)
+void tegra_software_i2c_disable(unsigned int bus)
{
software_i2c[bus] = NULL;
diff --git a/src/soc/nvidia/tegra124/i2c.c b/src/soc/nvidia/tegra124/i2c.c
index 76b8f13..ee339bb 100644
--- a/src/soc/nvidia/tegra124/i2c.c
+++ b/src/soc/nvidia/tegra124/i2c.c
@@ -50,4 +50,4 @@
}
};
-unsigned g_num_i2c_buses = ARRAY_SIZE(tegra_i2c_info);
+unsigned int g_num_i2c_buses = ARRAY_SIZE(tegra_i2c_info);
diff --git a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
index e00dbd10..0ebe8e7 100644
--- a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
@@ -292,7 +292,7 @@
halt();
}
-static void udelay(unsigned usecs)
+static void udelay(unsigned int usecs)
{
uint32_t start = read32(timer_us_ptr);
while (read32(timer_us_ptr) - start < usecs)
@@ -313,7 +313,7 @@
return read32(pmc_ctlr_scratch41_ptr);
}
-static unsigned get_osc_freq(void)
+static unsigned int get_osc_freq(void)
{
return (read32(clk_rst_osc_ctrl_ptr) & OSC_FREQ_MASK) >> OSC_FREQ_SHIFT;
}
@@ -507,7 +507,7 @@
/* Power. */
-static void power_on_partition(unsigned id)
+static void power_on_partition(unsigned int id)
{
uint32_t bit = 0x1 << id;
if (!(read32(pmc_ctlr_pwrgate_status_ptr) & bit)) {
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index f5f72af..9bebc72 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -45,7 +45,7 @@
static void tegra124_uart_init(struct tegra124_uart *uart_ptr)
{
// Use a hardcoded divisor for now.
- const unsigned divisor = 221;
+ const unsigned int divisor = 221;
const uint8_t line_config = UART8250_LCR_WLS_8; // 8n1
tegra124_uart_tx_flush(uart_ptr);
diff --git a/src/soc/nvidia/tegra210/i2c.c b/src/soc/nvidia/tegra210/i2c.c
index 35ee7771..34aae5a 100644
--- a/src/soc/nvidia/tegra210/i2c.c
+++ b/src/soc/nvidia/tegra210/i2c.c
@@ -50,4 +50,4 @@
}
};
-unsigned g_num_i2c_buses = ARRAY_SIZE(tegra_i2c_info);
+unsigned int g_num_i2c_buses = ARRAY_SIZE(tegra_i2c_info);
diff --git a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
index c6a8393..6ff95b8 100644
--- a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
@@ -456,7 +456,7 @@
halt();
}
-static void udelay(unsigned usecs)
+static void udelay(unsigned int usecs)
{
uint32_t start = read32(timer_us_ptr);
while (read32(timer_us_ptr) - start < usecs)
@@ -638,7 +638,7 @@
/* Power. */
-static void power_on_partition(unsigned id)
+static void power_on_partition(unsigned int id)
{
uint32_t bit = 0x1 << id;
if (!(read32(pmc_pwrgate_status_ptr) & bit)) {
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index 904aafa..b5cf5d5 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -49,7 +49,7 @@
static void tegra210_uart_init(void)
{
// Use a hardcoded divisor for now.
- const unsigned divisor = 221;
+ const unsigned int divisor = 221;
const uint8_t line_config = UART8250_LCR_WLS_8; // 8n1
tegra210_uart_tx_flush();
diff --git a/src/soc/qualcomm/ipq40xx/gpio.c b/src/soc/qualcomm/ipq40xx/gpio.c
index a4b06c2..4135241 100644
--- a/src/soc/qualcomm/ipq40xx/gpio.c
+++ b/src/soc/qualcomm/ipq40xx/gpio.c
@@ -58,11 +58,11 @@
*******************************************************/
-void gpio_tlmm_config_set(gpio_t gpio, unsigned func,
- unsigned pull, unsigned drvstr,
- unsigned enable)
+void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
+ unsigned int pull, unsigned int drvstr,
+ unsigned int enable)
{
- unsigned val = 0;
+ unsigned int val = 0;
if (gpio_not_valid(gpio))
return;
@@ -88,11 +88,11 @@
*******************************************************/
-void gpio_tlmm_config_get(gpio_t gpio, unsigned *func,
- unsigned *pull, unsigned *drvstr,
- unsigned *enable)
+void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func,
+ unsigned int *pull, unsigned int *drvstr,
+ unsigned int *enable)
{
- unsigned val;
+ unsigned int val;
void *addr = GPIO_CONFIG_ADDR(gpio);
if (gpio_not_valid(gpio))
diff --git a/src/soc/qualcomm/ipq40xx/i2c.c b/src/soc/qualcomm/ipq40xx/i2c.c
index f20dada..17d772a 100644
--- a/src/soc/qualcomm/ipq40xx/i2c.c
+++ b/src/soc/qualcomm/ipq40xx/i2c.c
@@ -152,7 +152,7 @@
return 0;
}
-int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments,
+int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments,
int seg_count)
{
struct i2c_msg *seg = segments;
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
index 05a17c2..1e26dcd 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
@@ -33,7 +33,7 @@
#include <types.h>
-unsigned smem_get_board_machtype(void);
+unsigned int smem_get_board_machtype(void);
typedef enum {
PHY_INTERFACE_MODE_MII,
@@ -116,17 +116,17 @@
} spinorflash_params_t;
typedef struct {
- unsigned count;
+ unsigned int count;
uint8_t addr[7];
} ipq_gmac_phy_addr_t;
typedef struct {
- unsigned base;
+ unsigned int base;
int unit;
- unsigned is_macsec;
- unsigned mac_pwr0;
- unsigned mac_pwr1;
- unsigned mac_conn_to_phy;
+ unsigned int is_macsec;
+ unsigned int mac_pwr0;
+ unsigned int mac_pwr1;
+ unsigned int mac_conn_to_phy;
phy_interface_t phy;
ipq_gmac_phy_addr_t phy_addr;
} ipq_gmac_board_cfg_t;
@@ -169,7 +169,7 @@
}
#endif
-unsigned int get_board_index(unsigned machid);
-void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count);
+unsigned int get_board_index(unsigned int machid);
+void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count);
#endif /* _IPQ40XX_CDP_H_ */
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/clock.h b/src/soc/qualcomm/ipq40xx/include/soc/clock.h
index 8544c43..c79c50b 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/clock.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/clock.h
@@ -209,7 +209,7 @@
unsigned int d);
void nand_clock_config(void);
void usb_clock_config(void);
-int audio_clock_config(unsigned frequency);
+int audio_clock_config(unsigned int frequency);
int blsp_i2c_clock_config(blsp_qup_id_t id);
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/qup.h b/src/soc/qualcomm/ipq40xx/include/soc/qup.h
index e55989a..7b77543 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/qup.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/qup.h
@@ -159,10 +159,10 @@
typedef struct {
qup_protocol_t protocol;
- unsigned clk_frequency;
- unsigned src_frequency;
+ unsigned int clk_frequency;
+ unsigned int src_frequency;
qup_mode_t mode;
- unsigned initialized;
+ unsigned int initialized;
} qup_config_t;
typedef struct {
@@ -171,12 +171,12 @@
struct {
uint8_t addr;
uint8_t *data;
- unsigned data_len;
+ unsigned int data_len;
} iic;
struct {
void *in;
void *out;
- unsigned size;
+ unsigned int size;
} spi;
} p;
} qup_data_t;
diff --git a/src/soc/qualcomm/ipq40xx/lcc.c b/src/soc/qualcomm/ipq40xx/lcc.c
index 9a6c911..392bd9c 100644
--- a/src/soc/qualcomm/ipq40xx/lcc.c
+++ b/src/soc/qualcomm/ipq40xx/lcc.c
@@ -76,11 +76,11 @@
} IpqLccPllRegs;
struct lcc_freq_tbl {
- unsigned freq;
- unsigned pd;
- unsigned m;
- unsigned n;
- unsigned d;
+ unsigned int freq;
+ unsigned int pd;
+ unsigned int m;
+ unsigned int n;
+ unsigned int d;
};
static const struct lcc_freq_tbl lcc_mi2s_freq_tbl[] = {
@@ -205,12 +205,12 @@
return 1;
}
-static int lcc_init_mi2s(IpqLccClocks *bus, unsigned freq)
+static int lcc_init_mi2s(IpqLccClocks *bus, unsigned int freq)
{
IpqLccMi2sRegs *mi2s_regs = bus->lcc_mi2s_regs;
uint32_t regval;
uint8_t pd, m, n, d;
- unsigned i;
+ unsigned int i;
i = 0;
while (lcc_mi2s_freq_tbl[i].freq != 0) {
@@ -285,7 +285,7 @@
return 1;
}
-int audio_clock_config(unsigned frequency)
+int audio_clock_config(unsigned int frequency)
{
IpqLccClocks bus = {
.gcc_apcs_regs = (void *)(MSM_GCC_BASE + GCC_PLL_APCS_REG),
diff --git a/src/soc/qualcomm/ipq40xx/qup.c b/src/soc/qualcomm/ipq40xx/qup.c
index 438bd14..9a206fc 100644
--- a/src/soc/qualcomm/ipq40xx/qup.c
+++ b/src/soc/qualcomm/ipq40xx/qup.c
@@ -100,7 +100,7 @@
/*
* Check whether GSBIn_QUP State is valid
*/
-static qup_return_t qup_wait_for_state(blsp_qup_id_t id, unsigned wait_for)
+static qup_return_t qup_wait_for_state(blsp_qup_id_t id, unsigned int wait_for)
{
return check_bit_state(QUP_ADDR(id, QUP_STATE), wait_for);
}
@@ -195,8 +195,8 @@
qup_return_t ret = QUP_ERR_UNDEFINED;
uint8_t addr = p_tx_obj->p.iic.addr;
uint8_t *data_ptr = p_tx_obj->p.iic.data;
- unsigned data_len = p_tx_obj->p.iic.data_len;
- unsigned idx = 0;
+ unsigned int data_len = p_tx_obj->p.iic.data_len;
+ unsigned int idx = 0;
uint32_t tag, *fifo = QUP_ADDR(id, QUP_OUTPUT_FIFO);
qup_reset_master_status(id);
@@ -312,8 +312,8 @@
qup_return_t ret = QUP_ERR_UNDEFINED;
uint8_t addr = p_tx_obj->p.iic.addr;
uint8_t *data_ptr = p_tx_obj->p.iic.data;
- unsigned data_len = p_tx_obj->p.iic.data_len;
- unsigned idx = 0;
+ unsigned int data_len = p_tx_obj->p.iic.data_len;
+ unsigned int idx = 0;
uint32_t *fifo = QUP_ADDR(id, QUP_OUTPUT_FIFO);
qup_reset_master_status(id);
@@ -476,7 +476,7 @@
qup_return_t qup_set_state(blsp_qup_id_t id, uint32_t state)
{
qup_return_t ret = QUP_ERR_UNDEFINED;
- unsigned curr_state = read32(QUP_ADDR(id, QUP_STATE));
+ unsigned int curr_state = read32(QUP_ADDR(id, QUP_STATE));
if (state <= QUP_STATE_PAUSE && (curr_state & QUP_STATE_VALID_MASK)) {
/*
diff --git a/src/soc/qualcomm/ipq40xx/timer.c b/src/soc/qualcomm/ipq40xx/timer.c
index a08f1fb..1401730 100644
--- a/src/soc/qualcomm/ipq40xx/timer.c
+++ b/src/soc/qualcomm/ipq40xx/timer.c
@@ -70,7 +70,7 @@
* udelay - generates micro second delay.
* @param usec: delay duration in microseconds
*/
-void udelay(unsigned usec)
+void udelay(unsigned int usec)
{
uint64_t expire;
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index 6e5bac6..9548bf0 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -44,7 +44,7 @@
typedef struct {
void *uart_dm_base;
uart_clk_mnd_t mnd_value;
- unsigned blsp_uart;
+ unsigned int blsp_uart;
gpio_func_data_t dbg_uart_gpio[NO_OF_DBG_UART_GPIOS];
} uart_params_t;
diff --git a/src/soc/qualcomm/ipq806x/gpio.c b/src/soc/qualcomm/ipq806x/gpio.c
index 2b27e6d..0196351 100644
--- a/src/soc/qualcomm/ipq806x/gpio.c
+++ b/src/soc/qualcomm/ipq806x/gpio.c
@@ -59,11 +59,11 @@
*******************************************************/
-void gpio_tlmm_config_set(gpio_t gpio, unsigned func,
- unsigned pull, unsigned drvstr,
- unsigned enable)
+void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
+ unsigned int pull, unsigned int drvstr,
+ unsigned int enable)
{
- unsigned val = 0;
+ unsigned int val = 0;
if (gpio_not_valid(gpio))
return;
@@ -89,11 +89,11 @@
*******************************************************/
-void gpio_tlmm_config_get(gpio_t gpio, unsigned *func,
- unsigned *pull, unsigned *drvstr,
- unsigned *enable)
+void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func,
+ unsigned int *pull, unsigned int *drvstr,
+ unsigned int *enable)
{
- unsigned val;
+ unsigned int val;
void *addr = GPIO_CONFIG_ADDR(gpio);
if (gpio_not_valid(gpio))
diff --git a/src/soc/qualcomm/ipq806x/gsbi.c b/src/soc/qualcomm/ipq806x/gsbi.c
index 4e3c780..18b1876 100644
--- a/src/soc/qualcomm/ipq806x/gsbi.c
+++ b/src/soc/qualcomm/ipq806x/gsbi.c
@@ -57,12 +57,12 @@
gsbi_return_t gsbi_init(gsbi_id_t gsbi_id, gsbi_protocol_t protocol)
{
- unsigned reg_val;
- unsigned m = 1;
- unsigned n = 4;
- unsigned pre_div = 4;
- unsigned src = 3;
- unsigned mnctr_mode = 2;
+ unsigned int reg_val;
+ unsigned int m = 1;
+ unsigned int n = 4;
+ unsigned int pre_div = 4;
+ unsigned int src = 3;
+ unsigned int mnctr_mode = 2;
void *gsbi_ctl = gsbi_ctl_reg_addr(gsbi_id);
if (!gsbi_ctl)
diff --git a/src/soc/qualcomm/ipq806x/i2c.c b/src/soc/qualcomm/ipq806x/i2c.c
index c81373f..e24e76d 100644
--- a/src/soc/qualcomm/ipq806x/i2c.c
+++ b/src/soc/qualcomm/ipq806x/i2c.c
@@ -96,9 +96,9 @@
return 0;
}
-static int i2c_init(unsigned bus)
+static int i2c_init(unsigned int bus)
{
- unsigned gsbi_id = bus;
+ unsigned int gsbi_id = bus;
qup_config_t *qup_config;
switch (gsbi_id) {
@@ -139,7 +139,7 @@
return 0;
}
-int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments,
+int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments,
int seg_count)
{
struct i2c_msg *seg = segments;
diff --git a/src/soc/qualcomm/ipq806x/include/soc/cdp.h b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
index 89636ac..35659a7 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
@@ -18,7 +18,7 @@
#include <types.h>
-unsigned smem_get_board_machtype(void);
+unsigned int smem_get_board_machtype(void);
typedef enum {
PHY_INTERFACE_MODE_MII,
@@ -101,17 +101,17 @@
} spinorflash_params_t;
typedef struct {
- unsigned count;
+ unsigned int count;
uint8_t addr[7];
} ipq_gmac_phy_addr_t;
typedef struct {
- unsigned base;
+ unsigned int base;
int unit;
- unsigned is_macsec;
- unsigned mac_pwr0;
- unsigned mac_pwr1;
- unsigned mac_conn_to_phy;
+ unsigned int is_macsec;
+ unsigned int mac_pwr0;
+ unsigned int mac_pwr1;
+ unsigned int mac_conn_to_phy;
phy_interface_t phy;
ipq_gmac_phy_addr_t phy_addr;
} ipq_gmac_board_cfg_t;
@@ -154,8 +154,8 @@
}
#endif
-unsigned int get_board_index(unsigned machid);
-void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count);
+unsigned int get_board_index(unsigned int machid);
+void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count);
void board_nand_init(void);
diff --git a/src/soc/qualcomm/ipq806x/include/soc/clock.h b/src/soc/qualcomm/ipq806x/include/soc/clock.h
index 7ecc1ee..47d7d49 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/clock.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/clock.h
@@ -193,6 +193,6 @@
unsigned int d, unsigned int clk_dummy);
void nand_clock_config(void);
void usb_clock_config(void);
-int audio_clock_config(unsigned frequency);
+int audio_clock_config(unsigned int frequency);
#endif /* __IPQ860X_CLOCK_H_ */
diff --git a/src/soc/qualcomm/ipq806x/include/soc/qup.h b/src/soc/qualcomm/ipq806x/include/soc/qup.h
index 5168b19..2b0cff3 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/qup.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/qup.h
@@ -145,10 +145,10 @@
typedef struct {
qup_protocol_t protocol;
- unsigned clk_frequency;
- unsigned src_frequency;
+ unsigned int clk_frequency;
+ unsigned int src_frequency;
qup_mode_t mode;
- unsigned initialized;
+ unsigned int initialized;
} qup_config_t;
typedef struct {
@@ -157,12 +157,12 @@
struct {
uint8_t addr;
uint8_t *data;
- unsigned data_len;
+ unsigned int data_len;
} iic;
struct {
void *in;
void *out;
- unsigned size;
+ unsigned int size;
} spi;
} p;
} qup_data_t;
diff --git a/src/soc/qualcomm/ipq806x/lcc.c b/src/soc/qualcomm/ipq806x/lcc.c
index 8f862b4..7d8d7bf 100644
--- a/src/soc/qualcomm/ipq806x/lcc.c
+++ b/src/soc/qualcomm/ipq806x/lcc.c
@@ -76,11 +76,11 @@
} Ipq806xLccPllRegs;
struct lcc_freq_tbl {
- unsigned freq;
- unsigned pd;
- unsigned m;
- unsigned n;
- unsigned d;
+ unsigned int freq;
+ unsigned int pd;
+ unsigned int m;
+ unsigned int n;
+ unsigned int d;
};
static const struct lcc_freq_tbl lcc_mi2s_freq_tbl[] = {
@@ -205,12 +205,12 @@
return 1;
}
-static int lcc_init_mi2s(Ipq806xLccClocks *bus, unsigned freq)
+static int lcc_init_mi2s(Ipq806xLccClocks *bus, unsigned int freq)
{
Ipq806xLccMi2sRegs *mi2s_regs = bus->lcc_mi2s_regs;
uint32_t regval;
uint8_t pd, m, n, d;
- unsigned i;
+ unsigned int i;
i = 0;
while (lcc_mi2s_freq_tbl[i].freq != 0) {
@@ -285,7 +285,7 @@
return 1;
}
-int audio_clock_config(unsigned frequency)
+int audio_clock_config(unsigned int frequency)
{
Ipq806xLccClocks bus = {
.gcc_apcs_regs = (void *)(MSM_GCC_BASE + GCC_PLL_APCS_REG),
diff --git a/src/soc/qualcomm/ipq806x/qup.c b/src/soc/qualcomm/ipq806x/qup.c
index 3ceb84d..dcfc00c 100644
--- a/src/soc/qualcomm/ipq806x/qup.c
+++ b/src/soc/qualcomm/ipq806x/qup.c
@@ -37,14 +37,14 @@
#define TIMEOUT_CNT 100000
//TODO: refactor the following array to iomap driver.
-static unsigned gsbi_qup_base[] = {
- (unsigned)GSBI_QUP1_BASE,
- (unsigned)GSBI_QUP2_BASE,
- (unsigned)GSBI_QUP3_BASE,
- (unsigned)GSBI_QUP4_BASE,
- (unsigned)GSBI_QUP5_BASE,
- (unsigned)GSBI_QUP6_BASE,
- (unsigned)GSBI_QUP7_BASE,
+static unsigned int gsbi_qup_base[] = {
+ (unsigned int)GSBI_QUP1_BASE,
+ (unsigned int)GSBI_QUP2_BASE,
+ (unsigned int)GSBI_QUP3_BASE,
+ (unsigned int)GSBI_QUP4_BASE,
+ (unsigned int)GSBI_QUP5_BASE,
+ (unsigned int)GSBI_QUP6_BASE,
+ (unsigned int)GSBI_QUP7_BASE,
};
#define QUP_ADDR(gsbi_num, reg) ((void *)((gsbi_qup_base[gsbi_num-1]) + (reg)))
@@ -91,7 +91,7 @@
/*
* Check whether GSBIn_QUP State is valid
*/
-static qup_return_t qup_wait_for_state(gsbi_id_t gsbi_id, unsigned wait_for)
+static qup_return_t qup_wait_for_state(gsbi_id_t gsbi_id, unsigned int wait_for)
{
return check_bit_state(QUP_ADDR(gsbi_id, QUP_STATE), wait_for);
}
@@ -155,8 +155,8 @@
qup_return_t ret = QUP_ERR_UNDEFINED;
uint8_t addr = p_tx_obj->p.iic.addr;
uint8_t *data_ptr = p_tx_obj->p.iic.data;
- unsigned data_len = p_tx_obj->p.iic.data_len;
- unsigned idx = 0;
+ unsigned int data_len = p_tx_obj->p.iic.data_len;
+ unsigned int idx = 0;
qup_reset_master_status(gsbi_id);
qup_set_state(gsbi_id, QUP_STATE_RUN);
@@ -228,8 +228,8 @@
qup_return_t ret = QUP_ERR_UNDEFINED;
uint8_t addr = p_tx_obj->p.iic.addr;
uint8_t *data_ptr = p_tx_obj->p.iic.data;
- unsigned data_len = p_tx_obj->p.iic.data_len;
- unsigned idx = 0;
+ unsigned int data_len = p_tx_obj->p.iic.data_len;
+ unsigned int idx = 0;
qup_reset_master_status(gsbi_id);
qup_set_state(gsbi_id, QUP_STATE_RUN);
@@ -377,7 +377,7 @@
qup_return_t qup_set_state(gsbi_id_t gsbi_id, uint32_t state)
{
qup_return_t ret = QUP_ERR_UNDEFINED;
- unsigned curr_state = read32(QUP_ADDR(gsbi_id, QUP_STATE));
+ unsigned int curr_state = read32(QUP_ADDR(gsbi_id, QUP_STATE));
if (state <= QUP_STATE_PAUSE && (curr_state & QUP_STATE_VALID_MASK)) {
/*
diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c
index 64a98d5..183b33c 100644
--- a/src/soc/qualcomm/ipq806x/spi.c
+++ b/src/soc/qualcomm/ipq806x/spi.c
@@ -632,7 +632,7 @@
}
static int spi_xfer_tx_packet(struct ipq_spi_slave *ds,
- const uint8_t *dout, unsigned out_bytes)
+ const uint8_t *dout, unsigned int out_bytes)
{
int ret;
@@ -660,7 +660,7 @@
}
static int spi_xfer_rx_packet(struct ipq_spi_slave *ds,
- uint8_t *din, unsigned in_bytes)
+ uint8_t *din, unsigned int in_bytes)
{
int ret;
@@ -711,7 +711,7 @@
SPI_QUP_CONF_OUTPUT_ENA);
while (out_bytes) {
- unsigned todo = MIN(out_bytes, MAX_PACKET_COUNT);
+ unsigned int todo = MIN(out_bytes, MAX_PACKET_COUNT);
ret = spi_xfer_tx_packet(ds, dout, todo);
if (ret)
@@ -733,7 +733,7 @@
SPI_QUP_CONF_INPUT_ENA);
while (in_bytes) {
- unsigned todo = MIN(in_bytes, MAX_PACKET_COUNT);
+ unsigned int todo = MIN(in_bytes, MAX_PACKET_COUNT);
ret = spi_xfer_rx_packet(ds, din, todo);
if (ret)
diff --git a/src/soc/qualcomm/ipq806x/timer.c b/src/soc/qualcomm/ipq806x/timer.c
index f52f2ef..25eebf4 100644
--- a/src/soc/qualcomm/ipq806x/timer.c
+++ b/src/soc/qualcomm/ipq806x/timer.c
@@ -72,7 +72,7 @@
* udelay - generates micro second delay.
* @param usec: delay duration in microseconds
*/
-void udelay(unsigned usec)
+void udelay(unsigned int usec)
{
uint32_t now;
uint32_t last;
diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c
index f3e7de5..36084f7 100644
--- a/src/soc/qualcomm/ipq806x/uart.c
+++ b/src/soc/qualcomm/ipq806x/uart.c
@@ -47,7 +47,7 @@
typedef struct {
void *uart_dm_base;
void *uart_gsbi_base;
- unsigned uart_gsbi;
+ unsigned int uart_gsbi;
uart_clk_mnd_t mnd_value;
gpio_func_data_t dbg_uart_gpio[NO_OF_DBG_UART_GPIOS];
} uart_params_t;
@@ -194,7 +194,7 @@
void uart_tx_byte(int idx, unsigned char data)
{
int num_of_chars = 1;
- unsigned tx_data = 0;
+ unsigned int tx_data = 0;
void *base = uart_board_param.uart_dm_base;
/* Wait until transmit FIFO is empty. */
diff --git a/src/soc/rockchip/common/i2c.c b/src/soc/rockchip/common/i2c.c
index cd0ed9b..953928e 100644
--- a/src/soc/rockchip/common/i2c.c
+++ b/src/soc/rockchip/common/i2c.c
@@ -231,7 +231,7 @@
return i2c_send_stop(reg_addr) || res;
}
-int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments,
+int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments,
int seg_count)
{
int i;
diff --git a/src/soc/rockchip/common/include/soc/i2c.h b/src/soc/rockchip/common/include/soc/i2c.h
index 4cdcbe0..56ad732 100644
--- a/src/soc/rockchip/common/include/soc/i2c.h
+++ b/src/soc/rockchip/common/include/soc/i2c.h
@@ -17,7 +17,7 @@
#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_I2C_H
void i2c_init(unsigned int bus, unsigned int hz);
-void software_i2c_attach(unsigned bus);
-void software_i2c_detach(unsigned bus);
+void software_i2c_attach(unsigned int bus);
+void software_i2c_detach(unsigned int bus);
#endif /* ! __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_I2C_H */
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index cee1ee2..f025d30 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -669,7 +669,7 @@
return read32(&cru_ptr->cru_glb_rst_st) & 0x30;
}
-unsigned rkclk_i2c_clock_for_bus(unsigned bus)
+unsigned int rkclk_i2c_clock_for_bus(unsigned int bus)
{
/*i2c0,i2c2 src clk from pd_bus_pclk
other i2c src clk from peri_pclk
diff --git a/src/soc/rockchip/rk3288/include/soc/clock.h b/src/soc/rockchip/rk3288/include/soc/clock.h
index b3c6302..40152d7 100644
--- a/src/soc/rockchip/rk3288/include/soc/clock.h
+++ b/src/soc/rockchip/rk3288/include/soc/clock.h
@@ -56,6 +56,6 @@
void rkclk_configure_edp(void);
void rkclk_configure_hdmi(void);
int rkclk_was_watchdog_reset(void);
-unsigned rkclk_i2c_clock_for_bus(unsigned bus);
+unsigned int rkclk_i2c_clock_for_bus(unsigned int bus);
#endif /* __SOC_ROCKCHIP_RK3288_CLOCK_H__ */
diff --git a/src/soc/rockchip/rk3288/software_i2c.c b/src/soc/rockchip/rk3288/software_i2c.c
index ae1249e..8c43984 100644
--- a/src/soc/rockchip/rk3288/software_i2c.c
+++ b/src/soc/rockchip/rk3288/software_i2c.c
@@ -33,17 +33,17 @@
[5]{.scl = GPIO(7, C, 4), .sda = GPIO(7, C, 3)},
};
-static int get_scl(unsigned bus)
+static int get_scl(unsigned int bus)
{
return gpio_get(pins[bus].scl);
}
-static int get_sda(unsigned bus)
+static int get_sda(unsigned int bus)
{
return gpio_get(pins[bus].sda);
}
-static void set_scl(unsigned bus, int high)
+static void set_scl(unsigned int bus, int high)
{
if (high)
gpio_input_pullup(pins[bus].scl);
@@ -51,7 +51,7 @@
gpio_output(pins[bus].scl, 0);
}
-static void set_sda(unsigned bus, int high)
+static void set_sda(unsigned int bus, int high)
{
if (high)
gpio_input_pullup(pins[bus].sda);
@@ -66,7 +66,7 @@
.set_sda = set_sda,
};
-void software_i2c_attach(unsigned bus)
+void software_i2c_attach(unsigned int bus)
{
software_i2c[bus] = &rk_ops;
@@ -101,7 +101,7 @@
set_sda(bus, 1);
}
-void software_i2c_detach(unsigned bus)
+void software_i2c_detach(unsigned int bus)
{
software_i2c[bus] = NULL;
diff --git a/src/soc/rockchip/rk3399/include/soc/clock.h b/src/soc/rockchip/rk3399/include/soc/clock.h
index 37a4c09..e2aeaea 100644
--- a/src/soc/rockchip/rk3399/include/soc/clock.h
+++ b/src/soc/rockchip/rk3399/include/soc/clock.h
@@ -118,7 +118,7 @@
void rkclk_configure_vop_aclk(u32 vop_id, u32 aclk_hz);
void rkclk_ddr_reset(u32 ch, u32 ctl, u32 phy);
int rkclk_was_watchdog_reset(void);
-uint32_t rkclk_i2c_clock_for_bus(unsigned bus);
+uint32_t rkclk_i2c_clock_for_bus(unsigned int bus);
void rkclk_configure_edp(unsigned int hz);
void rkclk_configure_mipi(void);
diff --git a/src/soc/samsung/exynos5250/clock.c b/src/soc/samsung/exynos5250/clock.c
index 7e7fe97..efb0de3 100644
--- a/src/soc/samsung/exynos5250/clock.c
+++ b/src/soc/samsung/exynos5250/clock.c
@@ -385,10 +385,10 @@
write32(addr, val);
}
-void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor)
+void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned int divisor)
{
- unsigned shift;
- unsigned mask = 0xff;
+ unsigned int shift;
+ unsigned int mask = 0xff;
u32 *reg;
/*
@@ -428,10 +428,10 @@
clrsetbits_le32(reg, mask << shift, (divisor & mask) << shift);
}
-void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor)
+void clock_ll_set_ratio(enum periph_id periph_id, unsigned int divisor)
{
- unsigned shift;
- unsigned mask = 0xff;
+ unsigned int shift;
+ unsigned int mask = 0xff;
u32 *reg;
switch (periph_id) {
diff --git a/src/soc/samsung/exynos5250/gpio.c b/src/soc/samsung/exynos5250/gpio.c
index 96cfef6..0ae2d2a 100644
--- a/src/soc/samsung/exynos5250/gpio.c
+++ b/src/soc/samsung/exynos5250/gpio.c
@@ -154,14 +154,14 @@
write32(&bank->drv, value);
}
-int gpio_direction_input(unsigned gpio)
+int gpio_direction_input(unsigned int gpio)
{
gpio_cfg_pin(gpio, GPIO_INPUT);
return 0;
}
-int gpio_direction_output(unsigned gpio, int value)
+int gpio_direction_output(unsigned int gpio, int value)
{
unsigned int val;
struct gpio_bank *bank = gpio_get_bank(gpio);
@@ -177,7 +177,7 @@
return 0;
}
-int gpio_get_value(unsigned gpio)
+int gpio_get_value(unsigned int gpio)
{
unsigned int value;
struct gpio_bank *bank = gpio_get_bank(gpio);
@@ -186,7 +186,7 @@
return !!(value & DAT_MASK(GPIO_BIT(gpio)));
}
-int gpio_set_value(unsigned gpio, int value)
+int gpio_set_value(unsigned int gpio, int value)
{
unsigned int val;
struct gpio_bank *bank = gpio_get_bank(gpio);
@@ -207,7 +207,7 @@
*/
#define GPIO_DELAY_US 5
-int gpio_read_mvl3(unsigned gpio)
+int gpio_read_mvl3(unsigned int gpio)
{
int high, low;
enum mvl3 value;
@@ -248,7 +248,7 @@
*/
void gpio_info(void)
{
- unsigned gpio;
+ unsigned int gpio;
for (gpio = 0; gpio < GPIO_MAX_PORT; gpio++) {
int cfg = gpio_get_cfg(gpio);
diff --git a/src/soc/samsung/exynos5250/i2c.c b/src/soc/samsung/exynos5250/i2c.c
index 0efd25c..e9aabf8 100644
--- a/src/soc/samsung/exynos5250/i2c.c
+++ b/src/soc/samsung/exynos5250/i2c.c
@@ -233,7 +233,7 @@
return 0;
}
-int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments,
+int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments,
int seg_count)
{
struct s3c24x0_i2c_bus *i2c = &i2c_busses[bus];
@@ -263,7 +263,7 @@
return i2c_send_stop(regs) || res;
}
-void i2c_init(unsigned bus, int speed, int slaveadd)
+void i2c_init(unsigned int bus, int speed, int slaveadd)
{
struct s3c24x0_i2c_bus *i2c = &i2c_busses[bus];
diff --git a/src/soc/samsung/exynos5250/include/soc/clk.h b/src/soc/samsung/exynos5250/include/soc/clk.h
index 971bfc2..fab0444 100644
--- a/src/soc/samsung/exynos5250/include/soc/clk.h
+++ b/src/soc/samsung/exynos5250/include/soc/clk.h
@@ -561,7 +561,7 @@
* @param periph_id Peripheral ID of peripheral to change
* @param divisor New divisor for this peripheral's clock
*/
-void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor);
+void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned int divisor);
/**
* Low-level function to set the clock ratio for a peripheral
@@ -569,7 +569,7 @@
* @param periph_id Peripheral ID of peripheral to change
* @param divisor New divisor for this peripheral's clock
*/
-void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor);
+void clock_ll_set_ratio(enum periph_id periph_id, unsigned int divisor);
/**
* Low-level function that selects the best clock scalars for a given rate and
diff --git a/src/soc/samsung/exynos5250/include/soc/gpio.h b/src/soc/samsung/exynos5250/include/soc/gpio.h
index 959fbd1..a521bea 100644
--- a/src/soc/samsung/exynos5250/include/soc/gpio.h
+++ b/src/soc/samsung/exynos5250/include/soc/gpio.h
@@ -482,7 +482,7 @@
* @return -1 if the value cannot be determined. Otherwise returns
* the corresponding MVL3 enum value.
*/
-int gpio_read_mvl3(unsigned gpio);
+int gpio_read_mvl3(unsigned int gpio);
void gpio_info(void);
@@ -510,7 +510,7 @@
* @param gpio GPIO number
* @return 0 if ok, -1 on error
*/
-int gpio_direction_input(unsigned gpio);
+int gpio_direction_input(unsigned int gpio);
/**
* Make a GPIO an output, and set its value.
@@ -519,7 +519,7 @@
* @param value GPIO value (0 for low or 1 for high)
* @return 0 if ok, -1 on error
*/
-int gpio_direction_output(unsigned gpio, int value);
+int gpio_direction_output(unsigned int gpio, int value);
/**
* Get a GPIO's value. This will work whether the GPIO is an input
@@ -528,7 +528,7 @@
* @param gpio GPIO number
* @return 0 if low, 1 if high, -1 on error
*/
-int gpio_get_value(unsigned gpio);
+int gpio_get_value(unsigned int gpio);
/**
* Set an output GPIO's value. The GPIO must already be an output or
@@ -538,7 +538,7 @@
* @param value GPIO value (0 for low or 1 for high)
* @return 0 if ok, -1 on error
*/
-int gpio_set_value(unsigned gpio, int value);
+int gpio_set_value(unsigned int gpio, int value);
/*
* Many-value logic (3 states). This can be used for inputs whereby presence
diff --git a/src/soc/samsung/exynos5250/include/soc/i2c.h b/src/soc/samsung/exynos5250/include/soc/i2c.h
index d58237c..aa45883 100644
--- a/src/soc/samsung/exynos5250/include/soc/i2c.h
+++ b/src/soc/samsung/exynos5250/include/soc/i2c.h
@@ -16,6 +16,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5250_I2C_H
#define CPU_SAMSUNG_EXYNOS5250_I2C_H
-void i2c_init(unsigned bus, int speed, int slaveadd);
+void i2c_init(unsigned int bus, int speed, int slaveadd);
#endif /* CPU_SAMSUNG_EXYNOS5250_I2C_H */
diff --git a/src/soc/samsung/exynos5250/include/soc/tmu.h b/src/soc/samsung/exynos5250/include/soc/tmu.h
index bd15a20..cb92c16 100644
--- a/src/soc/samsung/exynos5250/include/soc/tmu.h
+++ b/src/soc/samsung/exynos5250/include/soc/tmu.h
@@ -19,39 +19,39 @@
#define CPU_SAMSUNG_EXYNOS5250_TMU_H
struct tmu_reg {
- unsigned triminfo;
- unsigned rsvd1;
- unsigned rsvd2;
- unsigned rsvd3;
- unsigned rsvd4;
- unsigned triminfo_control;
- unsigned rsvd5;
- unsigned rsvd6;
- unsigned tmu_control;
- unsigned rsvd7;
- unsigned tmu_status;
- unsigned sampling_internal;
- unsigned counter_value0;
- unsigned counter_value1;
- unsigned rsvd8;
- unsigned rsvd9;
- unsigned current_temp;
- unsigned rsvd10;
- unsigned rsvd11;
- unsigned rsvd12;
- unsigned threshold_temp_rise;
- unsigned threshold_temp_fall;
- unsigned rsvd13;
- unsigned rsvd14;
- unsigned past_temp3_0;
- unsigned past_temp7_4;
- unsigned past_temp11_8;
- unsigned past_temp15_12;
- unsigned inten;
- unsigned intstat;
- unsigned intclear;
- unsigned rsvd15;
- unsigned emul_con;
+ unsigned int triminfo;
+ unsigned int rsvd1;
+ unsigned int rsvd2;
+ unsigned int rsvd3;
+ unsigned int rsvd4;
+ unsigned int triminfo_control;
+ unsigned int rsvd5;
+ unsigned int rsvd6;
+ unsigned int tmu_control;
+ unsigned int rsvd7;
+ unsigned int tmu_status;
+ unsigned int sampling_internal;
+ unsigned int counter_value0;
+ unsigned int counter_value1;
+ unsigned int rsvd8;
+ unsigned int rsvd9;
+ unsigned int current_temp;
+ unsigned int rsvd10;
+ unsigned int rsvd11;
+ unsigned int rsvd12;
+ unsigned int threshold_temp_rise;
+ unsigned int threshold_temp_fall;
+ unsigned int rsvd13;
+ unsigned int rsvd14;
+ unsigned int past_temp3_0;
+ unsigned int past_temp7_4;
+ unsigned int past_temp11_8;
+ unsigned int past_temp15_12;
+ unsigned int inten;
+ unsigned int intstat;
+ unsigned int intclear;
+ unsigned int rsvd15;
+ unsigned int emul_con;
};
check_member(tmu_reg, emul_con, 0x80);
@@ -93,7 +93,7 @@
/* TMU device specific details and status */
struct tmu_info {
/* base Address for the TMU */
- unsigned tmu_base;
+ unsigned int tmu_base;
/* mux Address for the TMU */
int tmu_mux;
/* pre-defined values for calibration and thresholds */
diff --git a/src/soc/samsung/exynos5420/clock.c b/src/soc/samsung/exynos5420/clock.c
index 720506c..b578133 100644
--- a/src/soc/samsung/exynos5420/clock.c
+++ b/src/soc/samsung/exynos5420/clock.c
@@ -350,10 +350,10 @@
return 0;
}
-void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor)
+void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned int divisor)
{
- unsigned shift;
- unsigned mask = 0xff;
+ unsigned int shift;
+ unsigned int mask = 0xff;
u32 *reg;
/*
@@ -393,10 +393,10 @@
clrsetbits_le32(reg, mask << shift, (divisor & mask) << shift);
}
-void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor)
+void clock_ll_set_ratio(enum periph_id periph_id, unsigned int divisor)
{
- unsigned shift;
- unsigned mask = 0xf;
+ unsigned int shift;
+ unsigned int mask = 0xf;
u32 *reg;
switch (periph_id) {
diff --git a/src/soc/samsung/exynos5420/gpio.c b/src/soc/samsung/exynos5420/gpio.c
index 1462c29..97331a0 100644
--- a/src/soc/samsung/exynos5420/gpio.c
+++ b/src/soc/samsung/exynos5420/gpio.c
@@ -154,14 +154,14 @@
write32(&bank->drv, value);
}
-int gpio_direction_input(unsigned gpio)
+int gpio_direction_input(unsigned int gpio)
{
gpio_cfg_pin(gpio, GPIO_INPUT);
return 0;
}
-int gpio_direction_output(unsigned gpio, int value)
+int gpio_direction_output(unsigned int gpio, int value)
{
unsigned int val;
struct gpio_bank *bank = gpio_get_bank(gpio);
@@ -177,7 +177,7 @@
return 0;
}
-int gpio_get_value(unsigned gpio)
+int gpio_get_value(unsigned int gpio)
{
unsigned int value;
struct gpio_bank *bank = gpio_get_bank(gpio);
@@ -186,7 +186,7 @@
return !!(value & DAT_MASK(GPIO_BIT(gpio)));
}
-int gpio_set_value(unsigned gpio, int value)
+int gpio_set_value(unsigned int gpio, int value)
{
unsigned int val;
struct gpio_bank *bank = gpio_get_bank(gpio);
@@ -207,7 +207,7 @@
*/
#define GPIO_DELAY_US 15
-int gpio_read_mvl3(unsigned gpio)
+int gpio_read_mvl3(unsigned int gpio)
{
int high, low;
enum mvl3 value;
@@ -248,7 +248,7 @@
*/
void gpio_info(void)
{
- unsigned gpio;
+ unsigned int gpio;
for (gpio = 0; gpio < GPIO_MAX_PORT; gpio++) {
int cfg = gpio_get_cfg(gpio);
diff --git a/src/soc/samsung/exynos5420/i2c.c b/src/soc/samsung/exynos5420/i2c.c
index 00ad12f..4dd9caa 100644
--- a/src/soc/samsung/exynos5420/i2c.c
+++ b/src/soc/samsung/exynos5420/i2c.c
@@ -82,8 +82,8 @@
struct hsi2c_regs *hsregs;
int is_highspeed; /* High speed type, rather than I2C */
int id;
- unsigned clk_cycle;
- unsigned clk_div;
+ unsigned int clk_cycle;
+ unsigned int clk_div;
};
@@ -255,7 +255,7 @@
static int hsi2c_get_clk_details(struct i2c_bus *i2c, int *div, int *cycle,
- unsigned op_clk)
+ unsigned int op_clk)
{
struct hsi2c_regs *regs = i2c->hsregs;
unsigned long clkin = clock_get_periph_rate(i2c->periph_id);
@@ -361,7 +361,7 @@
write32(®s->stat, I2cStatMasterXmit | I2cStatEnable);
}
-void i2c_init(unsigned bus, int speed, int slaveadd)
+void i2c_init(unsigned int bus, int speed, int slaveadd)
{
struct i2c_bus *i2c = &i2c_busses[bus];
@@ -627,7 +627,7 @@
return 0;
}
-int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments, int count)
+int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments, int count)
{
struct i2c_bus *i2c = &i2c_busses[bus];
if (i2c->is_highspeed)
diff --git a/src/soc/samsung/exynos5420/include/soc/clk.h b/src/soc/samsung/exynos5420/include/soc/clk.h
index 262d6fb..08663ff 100644
--- a/src/soc/samsung/exynos5420/include/soc/clk.h
+++ b/src/soc/samsung/exynos5420/include/soc/clk.h
@@ -697,7 +697,7 @@
* @param periph_id Peripheral ID of peripheral to change
* @param divisor New divisor for this peripheral's clock
*/
-void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor);
+void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned int divisor);
/**
* Low-level function to set the clock ratio for a peripheral
@@ -705,7 +705,7 @@
* @param periph_id Peripheral ID of peripheral to change
* @param divisor New divisor for this peripheral's clock
*/
-void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor);
+void clock_ll_set_ratio(enum periph_id periph_id, unsigned int divisor);
/**
* Low-level function that selects the best clock scalars for a given rate and
diff --git a/src/soc/samsung/exynos5420/include/soc/gpio.h b/src/soc/samsung/exynos5420/include/soc/gpio.h
index 69ef046..6a40554 100644
--- a/src/soc/samsung/exynos5420/include/soc/gpio.h
+++ b/src/soc/samsung/exynos5420/include/soc/gpio.h
@@ -465,7 +465,7 @@
* @return -1 if the value cannot be determined. Otherwise returns
* the corresponding MVL3 enum value.
*/
-int gpio_read_mvl3(unsigned gpio);
+int gpio_read_mvl3(unsigned int gpio);
void gpio_info(void);
@@ -493,7 +493,7 @@
* @param gpio GPIO number
* @return 0 if ok, -1 on error
*/
-int gpio_direction_input(unsigned gpio);
+int gpio_direction_input(unsigned int gpio);
/**
* Make a GPIO an output, and set its value.
@@ -502,7 +502,7 @@
* @param value GPIO value (0 for low or 1 for high)
* @return 0 if ok, -1 on error
*/
-int gpio_direction_output(unsigned gpio, int value);
+int gpio_direction_output(unsigned int gpio, int value);
/**
* Get a GPIO's value. This will work whether the GPIO is an input
@@ -511,7 +511,7 @@
* @param gpio GPIO number
* @return 0 if low, 1 if high, -1 on error
*/
-int gpio_get_value(unsigned gpio);
+int gpio_get_value(unsigned int gpio);
/**
* Set an output GPIO's value. The GPIO must already be an output or
@@ -521,7 +521,7 @@
* @param value GPIO value (0 for low or 1 for high)
* @return 0 if ok, -1 on error
*/
-int gpio_set_value(unsigned gpio, int value);
+int gpio_set_value(unsigned int gpio, int value);
/*
* Many-value logic (3 states). This can be used for inputs whereby presence
diff --git a/src/soc/samsung/exynos5420/include/soc/i2c.h b/src/soc/samsung/exynos5420/include/soc/i2c.h
index dc894f5..ab93698 100644
--- a/src/soc/samsung/exynos5420/include/soc/i2c.h
+++ b/src/soc/samsung/exynos5420/include/soc/i2c.h
@@ -16,6 +16,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5420_I2C_H
#define CPU_SAMSUNG_EXYNOS5420_I2C_H
-void i2c_init(unsigned bus, int speed, int slaveadd);
+void i2c_init(unsigned int bus, int speed, int slaveadd);
#endif /* CPU_SAMSUNG_EXYNOS5420_I2C_H */
diff --git a/src/soc/samsung/exynos5420/include/soc/tmu.h b/src/soc/samsung/exynos5420/include/soc/tmu.h
index 9f75131..eade11f 100644
--- a/src/soc/samsung/exynos5420/include/soc/tmu.h
+++ b/src/soc/samsung/exynos5420/include/soc/tmu.h
@@ -19,39 +19,39 @@
#define CPU_SAMSUNG_EXYNOS5420_TMU_H
struct tmu_reg {
- unsigned triminfo;
- unsigned rsvd1;
- unsigned rsvd2;
- unsigned rsvd3;
- unsigned rsvd4;
- unsigned triminfo_control;
- unsigned rsvd5;
- unsigned rsvd6;
- unsigned tmu_control;
- unsigned rsvd7;
- unsigned tmu_status;
- unsigned sampling_internal;
- unsigned counter_value0;
- unsigned counter_value1;
- unsigned rsvd8;
- unsigned rsvd9;
- unsigned current_temp;
- unsigned rsvd10;
- unsigned rsvd11;
- unsigned rsvd12;
- unsigned threshold_temp_rise;
- unsigned threshold_temp_fall;
- unsigned rsvd13;
- unsigned rsvd14;
- unsigned past_temp3_0;
- unsigned past_temp7_4;
- unsigned past_temp11_8;
- unsigned past_temp15_12;
- unsigned inten;
- unsigned intstat;
- unsigned intclear;
- unsigned rsvd15;
- unsigned emul_con;
+ unsigned int triminfo;
+ unsigned int rsvd1;
+ unsigned int rsvd2;
+ unsigned int rsvd3;
+ unsigned int rsvd4;
+ unsigned int triminfo_control;
+ unsigned int rsvd5;
+ unsigned int rsvd6;
+ unsigned int tmu_control;
+ unsigned int rsvd7;
+ unsigned int tmu_status;
+ unsigned int sampling_internal;
+ unsigned int counter_value0;
+ unsigned int counter_value1;
+ unsigned int rsvd8;
+ unsigned int rsvd9;
+ unsigned int current_temp;
+ unsigned int rsvd10;
+ unsigned int rsvd11;
+ unsigned int rsvd12;
+ unsigned int threshold_temp_rise;
+ unsigned int threshold_temp_fall;
+ unsigned int rsvd13;
+ unsigned int rsvd14;
+ unsigned int past_temp3_0;
+ unsigned int past_temp7_4;
+ unsigned int past_temp11_8;
+ unsigned int past_temp15_12;
+ unsigned int inten;
+ unsigned int intstat;
+ unsigned int intclear;
+ unsigned int rsvd15;
+ unsigned int emul_con;
};
check_member(tmu_reg, emul_con, 0x80);
@@ -93,7 +93,7 @@
/* TMU device specific details and status */
struct tmu_info {
/* base Address for the TMU */
- unsigned tmu_base;
+ unsigned int tmu_base;
/* mux Address for the TMU */
int tmu_mux;
/* pre-defined values for calibration and thresholds */