soc/intel/skylake: Assign device ops in chipset devicetree
Some PCI IDs were missing, and at least one (SPT's fast SPI
device in a generic SPI driver) was wrong. Hence, this patch
actually changes behavior depending on the devices actually
present in a machine.
In this patch the Skylake devicetree is written in a single-line
style. Alternative, the device operations could be put on a separate
line, e.g.
device pci 00.0 alias system_agent on
ops systemagent_ops
end
Tested on Kontron/bSL6. Notable in the log diff is that the
CSE and SATA drivers are hooked up now.
Change-Id: I8635fc53ca617b029d6fe1845eaef6c5c749db82
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c
index 910f01d..d95e541 100644
--- a/src/soc/intel/common/block/p2sb/p2sb.c
+++ b/src/soc/intel/common/block/p2sb/p2sb.c
@@ -131,7 +131,7 @@
mmio_resource_kb(dev, PCI_BASE_ADDRESS_0, P2SB_BAR / KiB, P2SB_SIZE / KiB);
}
-static const struct device_operations device_ops = {
+const struct device_operations p2sb_ops = {
.read_resources = read_resources,
.set_resources = noop_set_resources,
.ops_pci = &pci_dev_ops_pci,
@@ -144,9 +144,6 @@
PCI_DID_INTEL_GLK_P2SB,
PCI_DID_INTEL_LWB_P2SB,
PCI_DID_INTEL_LWB_P2SB_SUPER,
- PCI_DID_INTEL_SKL_LP_P2SB,
- PCI_DID_INTEL_SKL_P2SB,
- PCI_DID_INTEL_KBL_P2SB,
PCI_DID_INTEL_CNL_P2SB,
PCI_DID_INTEL_CNP_H_P2SB,
PCI_DID_INTEL_ICL_P2SB,
@@ -163,7 +160,7 @@
};
static const struct pci_driver pmc __pci_driver = {
- .ops = &device_ops,
+ .ops = &p2sb_ops,
.vendor = PCI_VID_INTEL,
.devices = pci_device_ids,
};