drivers/intel/gma/vbt: Add Kconfig symbol for SSC ref

The selection of the SSC reference frequency for LVDS was based on a
completely unrelated clock.

The `ssc_freq` flag should be set when the SSC reference runs at a
different frequency than the general display reference clock (DREF).
For most platforms, there is no choice, i.e. for i945 and gm45 the SSC
reference always differs from the display reference clock (i945: 66Mhz
SSC vs. 48MHz DREF; gm45: 100MHz SSC vs. 96Mhz DREF), for Nehalem and
newer, it's the same frequency for SSC/non-SSC (120MHz).  The only,
currently supported platform with a choice seems to be Pineview, where
the alternative is 100MHz vs. the default 96MHz.

Change-Id: I7791754bd366c9fe6832c32eccef4657ba5f309b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/18186
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig
index 9c0f227..23290d5 100644
--- a/src/drivers/intel/gma/Kconfig
+++ b/src/drivers/intel/gma/Kconfig
@@ -2,6 +2,7 @@
 ## This file is part of the coreboot project.
 ##
 ## Copyright 2013 Google Inc.
+## Copyright 2016-2017 secunet Security Networks AG
 ##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
@@ -37,6 +38,21 @@
 	bool
 	default n
 
+config INTEL_GMA_SSC_ALTERNATE_REF
+	bool
+	default n
+	help
+	  Set when the SSC reference clock for LVDS runs at a different fre-
+	  quency than the general display reference clock.
+
+	  To be set by northbridge or mainboard Kconfig.  For most platforms,
+	  there is no choice, i.e. for i945 and gm45 the SSC reference always
+	  differs from the display reference clock (i945: 66Mhz SSC vs. 48MHz
+	  DREF; gm45: 100MHz SSC vs. 96Mhz DREF), for Nehalem and newer, it's
+	  the same frequency for SSC/non-SSC (120MHz).  The only, currently
+	  supported platform with a choice seems to be Pineview, where the
+	  alternative is 100MHz vs. the default 96MHz.
+
 config GFX_GMA_CPU
 	string
 	default "Skylake" if SOC_INTEL_SKYLAKE
diff --git a/src/drivers/intel/gma/vbt.c b/src/drivers/intel/gma/vbt.c
index 0d76afe..d8dd930 100644
--- a/src/drivers/intel/gma/vbt.c
+++ b/src/drivers/intel/gma/vbt.c
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2013, 2014 Vladimir Serbinenko
+ * Copyright (C) 2017 secunet Security Networks AG
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -59,7 +60,7 @@
 	genfeat->flexaim = 1;
 	genfeat->download_ext_vbt = 1;
 	genfeat->enable_ssc = conf->use_spread_spectrum_clock;
-	genfeat->ssc_freq = !conf->link_frequency_270_mhz;
+	genfeat->ssc_freq = IS_ENABLED(CONFIG_INTEL_GMA_SSC_ALTERNATE_REF);
 	genfeat->rsvd10 = 0x4;
 	genfeat->legacy_monitor_detect = 1;
 	genfeat->int_crt_support = 1;
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 9a370d5..ea6933d 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -24,6 +24,7 @@
 	select VGA
 	select INTEL_EDID
 	select INTEL_GMA_ACPI
+	select INTEL_GMA_SSC_ALTERNATE_REF
 	select RELOCATABLE_RAMSTAGE
 
 config CBFS_SIZE
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index efe192b..18e90b6 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -24,6 +24,7 @@
 	select LAPIC_MONOTONIC_TIMER
 	select VGA
 	select INTEL_GMA_ACPI
+	select INTEL_GMA_SSC_ALTERNATE_REF
 	select RELOCATABLE_RAMSTAGE
 
 config NORTHBRIDGE_INTEL_SUBTYPE_I945GC