tree f54563f65c33101e0f319fcc3a7f11cc4fadc4e8
parent 7a7cdf8efbd93f3fa935b0386ad5529c8d6d4960
author Johnny Lin <johnny_lin@wiwynn.com> 1655100343 +0800
committer David Hendricks <david.hendricks@gmail.com> 1675017634 +0000

drivers/intel/fsp2_0: Add saving MRC data after FSP-S option

When Kconfig SAVE_MRC_AFTER_FSPS is selected, save MRC training
data after FSP-S instead of FSP-M. For now only SPR-SP server
FSP supports this.
This issue surfaces with SPR-SP, because of the memory type
(DDR5 support) and memory capacity (more memory controllers, bigger
DRAM capacity). Therefore Intel decided to save MRC training data after
FSP-S with SPR-SP FSP.

Change-Id: I3bab0c5004e717e842b484c89187e8c0b9c2b3eb
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71950
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>