soc/amd/common/data_fabric: handle multiple PCI root domains
In the case of SoCs hat have more than one PCI root, we need to check to
which PCI root the PCI bus number, IO and MMIO regions configured in the
data fabric registers get routed to and only tell the resource allocator
about the resources that get routed to the current PCI root domain. For
this the numbers of the domains need to match the PCI root's destination
data fabric ID.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib6a6412f733d321044678d2b064c33418a53861c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
diff --git a/src/soc/amd/common/block/data_fabric/domain.c b/src/soc/amd/common/block/data_fabric/domain.c
index d693879..3924351 100644
--- a/src/soc/amd/common/block/data_fabric/domain.c
+++ b/src/soc/amd/common/block/data_fabric/domain.c
@@ -113,8 +113,10 @@
if (ctrl.np)
continue;
- /* TODO: Systems with more than one PCI root need to check to which PCI root
- the MMIO range gets decoded to. */
+ /* Only look at MMIO regions that are decoded to the right PCI root */
+ if (CONFIG(SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN_MULTI_PCI_ROOT) &&
+ ctrl.dst_fabric_id != domain->path.domain.domain)
+ continue;
data_fabric_get_mmio_base_size(i, &mmio_base, &mmio_limit);
@@ -168,8 +170,10 @@
limit_reg.raw = data_fabric_broadcast_read32(DF_IO_LIMIT(i));
- /* TODO: Systems with more than one PCI root need to check to which PCI root
- the IO range gets decoded to. */
+ /* Only look at IO regions that are decoded to the right PCI root */
+ if (CONFIG(SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN_MULTI_PCI_ROOT) &&
+ limit_reg.dst_fabric_id != domain->path.domain.domain)
+ continue;
io_base = base_reg.io_base << DF_IO_ADDR_SHIFT;
io_limit = ((limit_reg.io_limit + 1) << DF_IO_ADDR_SHIFT) - 1;