soc/intel/meteorlake: Add IOE P2SB Base Address
This patch introduces a new config named IOE_PCR_BASE_ADDRESS to define
P2SB base address.
BUG=b:290856936
TEST=Able to build and boot google/rex.
Change-Id: I289358f9c53b557a397bd7186e6b7419c5d8c954
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76411
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 7e1353a..72179f8 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -236,6 +236,12 @@
help
This option allows you to select MMIO Base Address of sideband bus.
+config IOE_PCR_BASE_ADDRESS
+ hex
+ default 0x3fff0000000
+ help
+ This option allows you to select MMIO Base Address of IOE sideband bus.
+
config ECAM_MMCONF_BASE_ADDRESS
default 0xc0000000
diff --git a/src/soc/intel/meteorlake/include/soc/iomap.h b/src/soc/intel/meteorlake/include/soc/iomap.h
index 3efe400..6903790 100644
--- a/src/soc/intel/meteorlake/include/soc/iomap.h
+++ b/src/soc/intel/meteorlake/include/soc/iomap.h
@@ -64,7 +64,7 @@
#define P2SB_BAR CONFIG_PCR_BASE_ADDRESS
#define P2SB_SIZE (16 * MiB)
-#define IOE_PCR_ABOVE_4G_BASE_ADDR 0x3fff0000000
+#define IOE_PCR_ABOVE_4G_BASE_ADDR CONFIG_IOE_PCR_BASE_ADDRESS
#define IOE_P2SB_BAR IOE_PCR_ABOVE_4G_BASE_ADDR
#define IOE_P2SB_SIZE (256 * MiB)