commit | 5554226426872051165c077009bd968837585cbd | [log] [tgz] |
---|---|---|
author | Paul Menzel <pmenzel@molgen.mpg.de> | Tue Nov 09 08:09:40 2021 +0100 |
committer | Felix Held <felix-coreboot@felixheld.de> | Thu Nov 11 14:28:13 2021 +0000 |
tree | c1ec061a64ce6ff16d24f6360f6d9b643e931967 | |
parent | 4b6ad4efe3d64c7e14136f1f62a3c71dac80c4fd [diff] |
Spell Intel Cooper Lake-SP with a space Use the official spelling. [1] [1]: https://ark.intel.com/content/www/us/en/ark/products/codename/189143/products-formerly-cooper-lake.html Change-Id: I7dbd332600caa7c04fc4f6bac53880e832e97bda Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index d912f17..0f025ac 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig
@@ -20,7 +20,7 @@ select PLATFORM_USES_FSP2_2 select CACHE_MRC_SETTINGS help - Intel Cooperlake-SP support + Intel Cooper Lake-SP support if XEON_SP_COMMON_BASE
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c index 19bf2af..a4da344 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.c +++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -186,7 +186,7 @@ } struct chip_operations soc_intel_xeon_sp_cpx_ops = { - CHIP_NAME("Intel Cooperlake-SP") + CHIP_NAME("Intel Cooper Lake-SP") .enable_dev = chip_enable_dev, .init = chip_init, .final = chip_final,